https://gcc.gnu.org/g:25151ba40ce81355f89971ef1ad5f80fcf2f5e37
commit r16-7974-g25151ba40ce81355f89971ef1ad5f80fcf2f5e37 Author: Richard Sandiford <[email protected]> Date: Tue Mar 10 09:43:29 2026 +0000 testsuite: Tweak caching of MIPS vector tests Some of the parallel MIPS tests that I ran recently seemed to be nondeterministic. Some tests were skipped and others were duplicated. This turned out to be because some MIPS check_effective_target procedures accept optional command-line flags. Sometimes the procedures are called as normal, without flags, and sometimes they are passed an explicit -m option. The problem is that both invocations use the same cache identifier. This means that the result of the first invocation (with or without flags) is used for all subsequent invocations (with or without flags). And the first invocation depends on which tests are being run by a particular parallel thread. As a result, the parallel threads did not agree on which tests needed to be run, and so got out of sync. The flags passed to the procedures all seem to be valid filenames, so this patch simply adds the flags to the cache identifier. It's a bit of a hack, and I'm not sure that this pattern should be followed for future tests. Doing that made check_effective_target_mpaired_single always succeed when no flags were passed, since it simply tests an empty function. Since there is no predefined macro (AFAICT), the patch tests for support using the same asm as check_mpaired_single_hw_available (but with an assemble test rather than with a run test). Also, check_mpaired_single_hw_available did not pass -mpaired-single to the hardware test, unlike the loongson_mmi and mma equivalents. gcc/testsuite/ * lib/target-supports.exp (check_effective_target_mips_loongson_mmi) (check_effective_target_mips_msa): Add the arguments to the cache identifier. (check_effective_target_mpaired_single): Likewise. Use an asm to test whether -mpaired-single is supported. (check_mpaired_single_hw_available): Add -mpaired-single. Diff: --- gcc/testsuite/lib/target-supports.exp | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 95a48444b168..6f85277f46db 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -1563,8 +1563,10 @@ proc check_effective_target_pie { } { # Return true if the target supports -mpaired-single (as used on MIPS). proc check_effective_target_mpaired_single { args } { - return [check_no_compiler_messages mpaired_single object { - void foo (void) { } + return [check_no_compiler_messages "mpaired_single_$args" object { + void foo (void) { + asm volatile ("pll.ps $f2,$f4,$f6"); + } } "$args"] } @@ -3100,7 +3102,7 @@ proc check_mpaired_single_hw_available { } { asm volatile ("pll.ps $f2,$f4,$f6"); return 0; } - } "" + } "-mpaired-single" } }] } @@ -7665,7 +7667,7 @@ proc add_options_for_mips_loongson_mmi { flags } { # the Loongson vector modes. proc check_effective_target_mips_loongson_mmi { args } { - return [check_no_compiler_messages loongson assembly { + return [check_no_compiler_messages "loongson_$args" assembly { #if !defined(__mips_loongson_mmi) #error !__mips_loongson_mmi #endif @@ -7690,7 +7692,7 @@ proc check_effective_target_mips_msa { args } { if ![check_effective_target_nomips16] { return 0 } - return [check_no_compiler_messages msa object { + return [check_no_compiler_messages "msa_$args" object { #if !defined(__mips_msa) #error "MSA NOT AVAIL" #else
