Hi there,
First time posting here so sorry if I posted to the wrong lists.
I have a question about the std::hardware_destructive_interference_size
constant value on riscv64.
As documented on cppreference[1], hardware_destructive_interference_size
provide a portable way to access the L1 data cache line size. And
Raymond mentions hardware_destructive_interference_size tells you
(basically) the size of a cache line in his blog[2].
But this value is 32 for riscv64, which seems wrong to me because IIRC
many riscv64 cpus have cacheline of size 64.
This value is defined to be __GCC_DESTRUCTIVE_SIZE. And Clang takes this
value from gcc when implementing their __GCC_DESTRUCTIVE_SIZE. In
general I am not familiar with the gcc code base and didn't find the
definition of this constant for riscv64 target. So I would really
appreciate it if anyone could explain why this value is 32 for riscv64.
And here's a godbolt link: https://godbolt.org/z/avWMbr8dK
[1]:
https://en.cppreference.com/w/cpp/thread/hardware_destructive_interference_size
[2]: https://devblogs.microsoft.com/oldnewthing/20230424-00/?p=108085
[3]: https://github.com/llvm/llvm-project/pull/89446#issuecomment-2070649367
Cheers,
Levi
