On 2011/3/11 10:14 PM, Chung-Lin Tang wrote: > Hi, > this patch adds a bit more sophistication to the handled xor RTX cases > in foo(). > > This may look a bit ad hoc, but I am seeing it useful for some cases > where we combine zero_extend with (not (shift ...)). The supplied ARM > testcase demonstrates when 3-insn combining comes up with: > (set (reg:SI 145) > (xor:SI (and:SI (not:SI (reg/v:SI 135 [ crc ])) > (const_int 32767 [0x7fff])) > (const_int 65535 [0xffff]))) > > when it is actually equivalent to: > (set (reg:SI 145) > (ior:SI (reg/v:SI 135 [ x ]) > (const_int 32768 [0x8000]))) > > This happens on ARM architecture levels v6 and above, due to its > possession of real zero_extend instructions. On ARMv5 and earlier, the > use of two shifts for zero extending actually helped to work around > this, due to staged combining effects of optimizing the shifts away one > by one... > > Cross-tested using QEMU for ARM-Linux, currently undergoing x86 > bootstrapping and testing. If results are clear, is this okay for trunk > when stage1 opens again? > > Thanks, > Chung-Lin > > * simplify-rtx.c (simplify_binary_operation_1): Handle > (xor (and A B) C) case when B and C are both constants.
Bootstrap and test on i686 and x86_64 both completed with no regressions.
