Is it ok to backport patches, with Changelogs below, already in trunk to gcc
4.6? These patches are for AVX-256bit load store splitting. These patches
make significant performance difference >=3% to several CPU2006 and
Polyhedron benchmarks on latest AMD and Intel hardware. If ok, I will post
backported patches for commit approval.

AMD plans to submit additional patches on AVX-256 load/store splitting to
trunk. We will send additional backport requests for those later once they
are accepted/comitted to trunk.

[PATCH] Split 32-byte AVX unaligned load/store.
gcc/
2011-03-27  H.J. Lu  <hongjiu...@intel.com>
        * config/i386/i386.c (flag_opts): Add -mavx256-split-unaligned-load
        and -mavx256-split-unaligned-store.
        (ix86_option_override_internal): Split 32-byte AVX unaligned
        load/store by default.
        (ix86_avx256_split_vector_move_misalign): New.
        (ix86_expand_vector_move_misalign): Use it.

        * config/i386/i386.opt: Add -mavx256-split-unaligned-load and
        -mavx256-split-unaligned-store.

        * config/i386/sse.md (*avx_mov<mode>_internal): Verify unaligned
        256bit load/store.  Generate unaligned store on misaligned memory
        operand.
        (*avx_movu<ssemodesuffix><avxmodesuffix>): Verify unaligned
        256bit load/store.
        (*avx_movdqu<avxmodesuffix>): Likewise.

        * doc/invoke.texi: Document -mavx256-split-unaligned-load and
        -mavx256-split-unaligned-store.
gcc/testsuite/
2011-03-27  H.J. Lu  <hongjiu...@intel.com>
        * gcc.target/i386/avx256-unaligned-load-1.c: New.
        * gcc.target/i386/avx256-unaligned-load-2.c: Likewise.
        * gcc.target/i386/avx256-unaligned-load-3.c: Likewise.
        * gcc.target/i386/avx256-unaligned-load-4.c: Likewise.
        * gcc.target/i386/avx256-unaligned-load-5.c: Likewise.
        * gcc.target/i386/avx256-unaligned-load-6.c: Likewise.
        * gcc.target/i386/avx256-unaligned-load-7.c: Likewise.
        * gcc.target/i386/avx256-unaligned-store-1.c: Likewise.
        * gcc.target/i386/avx256-unaligned-store-2.c: Likewise.
        * gcc.target/i386/avx256-unaligned-store-3.c: Likewise.
        * gcc.target/i386/avx256-unaligned-store-4.c: Likewise.
        * gcc.target/i386/avx256-unaligned-store-5.c: Likewise.
        * gcc.target/i386/avx256-unaligned-store-6.c: Likewise.
        * gcc.target/i386/avx256-unaligned-store-7.c: Likewise.

[PATCH] Don't assert unaligned 256bit load/store.
2011-03-27  H.J. Lu  <hongjiu...@intel.com>
        * config/i386/sse.md (*avx_mov<mode>_internal): Don't assert
        unaligned 256bit load/store.
        (*avx_movu<ssemodesuffix><avxmodesuffix>): Likewise.
        (*avx_movdqu<avxmodesuffix>): Likewise.

[PATCH] Fix a typo in -mavx256-split-unaligned-store.
2011-03-28  H.J. Lu  <hongjiu...@intel.com>
        * config/i386/i386.c (flag_opts): Fix a typo in
        -mavx256-split-unaligned-store.

[PATCH] * config/i386/i386.c (ix86_reorg): Run move_or_delete_vzeroupper first.
2011-05-04  Uros Bizjak  <ubiz...@gmail.com>
        * config/i386/i386.c (ix86_reorg): Run move_or_delete_vzeroupper first.

[PATCH] Save the initial options after checking vzeroupper.
gcc/
2011-05-23  H.J. Lu  <hongjiu...@intel.com>
        PR target/47315
        * config/i386/i386.c (ix86_option_override_internal): Save the
        initial options after checking vzeroupper.
gcc/testsuite/
2011-05-23  H.J. Lu  <hongjiu...@intel.com>
        PR target/47315
        * gcc.target/i386/pr47315.c: New test.


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