commit 18371383f2c6c866ec10dbf7e7e48aaa61a11e3e
Author: Kirill Yukhin <kirill.yukhin@intel.com>
Date:   Tue Jun 21 14:43:32 2011 +0400

    AVX2 supported in driver.

diff --git a/gcc/ChangeLog.avx2 b/gcc/ChangeLog.avx2
index 9c01fb6..1ee229e 100644
--- a/gcc/ChangeLog.avx2
+++ b/gcc/ChangeLog.avx2
@@ -1,3 +1,9 @@
+2011-06-21  Yukhin Kirill  <kirill.yukhin@intel.com>
+
+	* gcc/config/i386/driver-i386.c (host_detect_local_cpu): Define
+	and set has_avx2.
+	* gcc/doc/invoke.texi: Document -mavx2 and -mno-avx2.
+
 2011-06-20  Yukhin Kirill  <kirill.yukhin@intel.com>
 
 	* gcc/config/i386/i386.c (ix86_expand_args_builtin): Improved
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index efd4372..2bacba9 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -393,7 +393,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
   unsigned int has_lahf_lm = 0, has_sse4a = 0;
   unsigned int has_longmode = 0, has_3dnowp = 0, has_3dnow = 0;
   unsigned int has_movbe = 0, has_sse4_1 = 0, has_sse4_2 = 0;
-  unsigned int has_popcnt = 0, has_aes = 0, has_avx = 0;
+  unsigned int has_popcnt = 0, has_aes = 0, has_avx = 0, has_avx2 = 0;
   unsigned int has_pclmul = 0, has_abm = 0, has_lwp = 0;
   unsigned int has_fma = 0, has_fma4 = 0, has_xop = 0;
   unsigned int has_bmi = 0, has_tbm = 0;
@@ -473,6 +473,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
       __cpuid (0x7, eax, ebx, ecx, edx);
 
       has_bmi = ebx & bit_BMI;
+      has_avx2 = ebx & bit_AVX2;
     }
 
   if (!arch)
@@ -710,12 +711,13 @@ const char *host_detect_local_cpu (int argc, const char **argv)
       const char *bmi = has_bmi ? " -mbmi" : " -mno-bmi";
       const char *tbm = has_tbm ? " -mtbm" : " -mno-tbm";
       const char *avx = has_avx ? " -mavx" : " -mno-avx";
+      const char *avx2 = has_avx2 ? " -mavx2" : " -mno-avx2";
       const char *sse4_2 = has_sse4_2 ? " -msse4.2" : " -mno-sse4.2";
       const char *sse4_1 = has_sse4_1 ? " -msse4.1" : " -mno-sse4.1";
 
       options = concat (options, cx16, sahf, movbe, ase, pclmul,
 			popcnt, abm, lwp, fma, fma4, xop, bmi, tbm,
-			avx, sse4_2, sse4_1, NULL);
+			avx2, avx, sse4_2, sse4_1, NULL);
     }
 
 done:
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index e747f1d..ee1f2ab 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -600,7 +600,7 @@ Objective-C and Objective-C++ Dialects}.
 -mincoming-stack-boundary=@var{num} @gol
 -mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip -mvzeroupper @gol
 -mmmx  -msse  -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol
--maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfused-madd @gol
+-mavx2 -maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfused-madd @gol
 -msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlwp @gol
 -mthreads  -mno-align-stringops  -minline-all-stringops @gol
 -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
@@ -12560,6 +12560,8 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
 @itemx -mno-sse4
 @itemx -mavx
 @itemx -mno-avx
+@itemx -mavx2
+@itemx -mno-avx2
 @itemx -maes
 @itemx -mno-aes
 @itemx -mpclmul
@@ -12597,7 +12599,7 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
 @opindex m3dnow
 @opindex mno-3dnow
 These switches enable or disable the use of instructions in the MMX,
-SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, FSGSBASE, RDRND,
+SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND,
 F16C, SSE4A, FMA4, XOP, LWP, ABM, BMI, or 3DNow!@: extended instruction sets.
 These extensions are also available as built-in functions: see
 @ref{X86 Built-in Functions}, for details of the functions enabled and
diff --git a/gcc/testsuite/ChangeLog.avx2 b/gcc/testsuite/ChangeLog.avx2
index a211b3f..0be13ce 100644
--- a/gcc/testsuite/ChangeLog.avx2
+++ b/gcc/testsuite/ChangeLog.avx2
@@ -1,5 +1,11 @@
 2011-06-20  Yukhin Kirill  <kirill.yukhin@intel.com>
 
+	* gcc.target/i386/funcspec-5.c: Add avx2 and no-avx2 targets.
+	* gcc.target/i386/funcspec-6.c: Likewise.
+	* gcc.target/i386/sse-12.c: Likewise.
+
+2011-06-10  Yukhin Kirill  <kirill.yukhin@intel.com>
+
 	* gcc.target/i386/avx2-mpsadbw-3.c: New test to check error
 	diagnostic while passing wrong immediate.
 	* gcc.target/i386/avx2-vextracti128-3.c: Likewise.
diff --git a/gcc/testsuite/gcc.target/i386/funcspec-5.c b/gcc/testsuite/gcc.target/i386/funcspec-5.c
index 1e18dcf..b7febab 100644
--- a/gcc/testsuite/gcc.target/i386/funcspec-5.c
+++ b/gcc/testsuite/gcc.target/i386/funcspec-5.c
@@ -20,6 +20,8 @@ extern void test_sse4a (void)			__attribute__((__target__("sse4a")));
 extern void test_fma4 (void)			__attribute__((__target__("fma4")));
 extern void test_ssse3 (void)			__attribute__((__target__("ssse3")));
 extern void test_tbm (void)			__attribute__((__target__("tbm")));
+extern void test_avx (void)			__attribute__((__target__("avx")));
+extern void test_avx2 (void)			__attribute__((__target__("avx2")));
 
 extern void test_no_abm (void)			__attribute__((__target__("no-abm")));
 extern void test_no_aes (void)			__attribute__((__target__("no-aes")));
@@ -38,6 +40,8 @@ extern void test_no_sse4a (void)		__attribute__((__target__("no-sse4a")));
 extern void test_no_fma4 (void)			__attribute__((__target__("no-fma4")));
 extern void test_no_ssse3 (void)		__attribute__((__target__("no-ssse3")));
 extern void test_no_tbm (void)			__attribute__((__target__("no-tbm")));
+extern void test_no_avx (void)			__attribute__((__target__("no-avx")));
+extern void test_no_avx2 (void)   		__attribute__((__target__("no-avx2")));
 
 extern void test_arch_i386 (void)		__attribute__((__target__("arch=i386")));
 extern void test_arch_i486 (void)		__attribute__((__target__("arch=i486")));
diff --git a/gcc/testsuite/gcc.target/i386/funcspec-6.c b/gcc/testsuite/gcc.target/i386/funcspec-6.c
index 92a3cb5..709be29 100644
--- a/gcc/testsuite/gcc.target/i386/funcspec-6.c
+++ b/gcc/testsuite/gcc.target/i386/funcspec-6.c
@@ -20,6 +20,8 @@ extern void test_sse4a (void)			__attribute__((__target__("sse4a")));
 extern void test_fma4 (void)			__attribute__((__target__("fma4")));
 extern void test_ssse3 (void)			__attribute__((__target__("ssse3")));
 extern void test_tbm (void)			__attribute__((__target__("tbm")));
+extern void test_avx (void)			__attribute__((__target__("avx")));
+extern void test_avx2 (void)			__attribute__((__target__("avx2")));
 
 extern void test_no_abm (void)			__attribute__((__target__("no-abm")));
 extern void test_no_aes (void)			__attribute__((__target__("no-aes")));
@@ -38,6 +40,8 @@ extern void test_no_sse4a (void)		__attribute__((__target__("no-sse4a")));
 extern void test_no_fma4 (void)			__attribute__((__target__("no-fma4")));
 extern void test_no_ssse3 (void)		__attribute__((__target__("no-ssse3")));
 extern void test_no_tbm (void)			__attribute__((__target__("no-tbm")));
+extern void test_no_avx (void)			__attribute__((__target__("no-avx")));
+extern void test_no_avx2 (void) 		__attribute__((__target__("no-avx2")));
 
 extern void test_arch_nocona (void)		__attribute__((__target__("arch=nocona")));
 extern void test_arch_core2 (void)		__attribute__((__target__("arch=core2")));
diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c
index 4f8aaec..c12aa36 100644
--- a/gcc/testsuite/gcc.target/i386/sse-12.c
+++ b/gcc/testsuite/gcc.target/i386/sse-12.c
@@ -3,7 +3,7 @@
    popcntintrin.h and mm_malloc.h are usable
    with -O -std=c89 -pedantic-errors.  */
 /* { dg-do compile } */
-/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mbmi -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c" } */
+/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mbmi -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c" } */
 
 #include <x86intrin.h>
 
