On 02/09/2015 06:51 PM, Thomas Preud'homme wrote:
ChangeLog entry for part 1 is as follows:
*** gcc/ChangeLog ***
2015-02-09 Thomas Preud'homme <thomas.preudho...@arm.com>
* combine.c (sign_extend_short_imm): New.
(set_nonzero_bits_and_sign_copies): Use above new function for sign
extension of src short immediate.
(reg_nonzero_bits_for_combine): Likewise for tem.
OK with a very minor nit.
diff --git a/gcc/combine.c b/gcc/combine.c
index ad3bed0..f2b26c2 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -1640,6 +1640,26 @@ setup_incoming_promotions (rtx_insn *first)
}
}
+#ifdef SHORT_IMMEDIATES_SIGN_EXTEND
+/* If MODE has a precision lower than PREC and SRC is a non-negative constant
+ that would appear negative in MODE, sign-extend SRC for use in nonzero_bits
+ because some machines (maybe most) will actually do the sign-extension and
+ this is the conservative approach.
+
+ ??? For 2.5, try to tighten up the MD files in this regard instead of this
+ kludge. */
+
+static rtx
+sign_extend_short_imm (rtx src, machine_mode mode, unsigned int prec)
+{
+ if (GET_MODE_PRECISION (mode) < prec && CONST_INT_P (src)
+ && INTVAL (src) > 0 && val_signbit_known_set_p (mode, INTVAL (src)))
+ src = GEN_INT (INTVAL (src) | ~GET_MODE_MASK (mode));
Can you go ahead and put each condition of the && on a separate line.
It uses more vertical space, but IMHO makes this easier to read. As I
said, it was a nit :-)
OK with that fix.
jeff
