> - ix86_print_operand (file, x, 0);
> + /* Always use 64bit register for indirect branch. */
> + if (REG_P (x) && TARGET_64BIT)
> + print_reg (x, 'q', file);
> + else
> + ix86_print_operand (file, x, 0);
> return;
This bit is because of ...
> +(define_insn "*tablejump_1_x32"
> + [(set (pc) (zero_extend:DI
> + (match_operand:SI 0 "register_operand" "r")))
> + (use (label_ref (match_operand 1 "" "")))]
> + "TARGET_X32"
> + "jmp\t%A0"
> + [(set_attr "type" "ibr")
> + (set_attr "length_immediate" "0")])
... this bit, am I right?
Well, clearly the representation here is incorrect, or
you wouldn't have needed the hack in print_operand.
The jmp instruction does not zero_extend, does it? It
really looks at the entire 64-bit register. Now, while
generally we've just loaded the register from memory,
and while generally it ought to be zero_extended in the
register because of that, this is still an incorrect
representation.
You should not require a different tablejump_1. The
existing Pmode one is sufficient.
What needs changing is the tablejump expander.
Something like
if (TARGET_X32)
operands[0] = convert_memory_address (Pmode, operands[0]);
if (flag_pic)
{
...
}
r~
