Index: gcc/ChangeLog =================================================================== --- gcc/ChangeLog (revision 223867) +++ gcc/ChangeLog (working copy) @@ -1,3 +1,28 @@ +2015-06-10 Xiangyu Wei + + Backport from mainline r215046. + PR target/61749 + 2014-09-09 Kyrylo Tkachov + * config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers): + Use qualifier_immediate for last operand. Rename to... + (aarch64_types_ternop_lane_qualifiers): ... This. + (TYPES_QUADOP): Rename to... + (TYPES_TERNOP_LANE): ... This. + (aarch64_simd_expand_args): Return const0_rtx when encountering user + error. Change return of 0 to return of NULL_RTX. + (aarch64_crc32_expand_builtin): Likewise. + (aarch64_expand_builtin): Return NULL_RTX instead of 0. + ICE when expanding unknown builtin. + * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use + TERNOP_LANE qualifiers. + (sqdmlsl_lane): Likewise. + (sqdmlal_laneq): Likewise. + (sqdmlsl_laneq): Likewise. + (sqdmlal2_lane): Likewise. + (sqdmlsl2_lane): Likewise. + (sqdmlal2_laneq): Likewise. + (sqdmlsl2_laneq): Likewise. + 2015-05-28 Mike Frysinger * config/nios2/linux.h (CPP_SPEC): Define. Index: gcc/testsuite/ChangeLog =================================================================== --- gcc/testsuite/ChangeLog (revision 223867) +++ gcc/testsuite/ChangeLog (working copy) @@ -1,3 +1,11 @@ +2015-06-12 Xiangyu Wei + + Backport from mainline r215046: + PR target/61749 + 2014-09-09 Kyrylo Tkachov Backported from mainline Index: gcc/config/aarch64/aarch64-builtins.c =================================================================== --- gcc/config/aarch64/aarch64-builtins.c (revision 223867) +++ gcc/config/aarch64/aarch64-builtins.c (working copy) @@ -172,10 +172,10 @@ aarch64_types_ternopu_qualifiers[SIMD_MAX_BUILTIN_ #define TYPES_TERNOPU (aarch64_types_ternopu_qualifiers) static enum aarch64_type_qualifiers -aarch64_types_quadop_qualifiers[SIMD_MAX_BUILTIN_ARGS] +aarch64_types_ternop_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS] = { qualifier_none, qualifier_none, qualifier_none, - qualifier_none, qualifier_none }; -#define TYPES_QUADOP (aarch64_types_quadop_qualifiers) + qualifier_none, qualifier_immediate }; +#define TYPES_TERNOP_LANE (aarch64_types_ternop_lane_qualifiers) static enum aarch64_type_qualifiers aarch64_types_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS] @@ -818,8 +818,11 @@ aarch64_simd_expand_args (rtx target, int icode, i case SIMD_ARG_CONSTANT: if (!(*insn_data[icode].operand[argc + have_retval].predicate) (op[argc], mode[argc])) - error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, " + { + error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, " "expected %", argc + 1); + return const0_rtx; + } break; case SIMD_ARG_STOP: @@ -886,7 +889,7 @@ aarch64_simd_expand_args (rtx target, int icode, i } if (!pat) - return 0; + return NULL_RTX; emit_insn (pat); @@ -968,7 +971,7 @@ aarch64_expand_builtin (tree exp, if (fcode >= AARCH64_SIMD_BUILTIN_BASE) return aarch64_simd_expand_builtin (fcode, exp, target); - return NULL_RTX; + gcc_unreachable (); } tree Index: gcc/config/aarch64/aarch64-simd-builtins.def =================================================================== --- gcc/config/aarch64/aarch64-simd-builtins.def (revision 223867) +++ gcc/config/aarch64/aarch64-simd-builtins.def (working copy) @@ -145,16 +145,16 @@ BUILTIN_VSDQ_I_BHSI (UNOP, sqabs, 0) BUILTIN_VSDQ_I_BHSI (UNOP, sqneg, 0) - BUILTIN_VSD_HSI (QUADOP, sqdmlal_lane, 0) - BUILTIN_VSD_HSI (QUADOP, sqdmlsl_lane, 0) - BUILTIN_VSD_HSI (QUADOP, sqdmlal_laneq, 0) - BUILTIN_VSD_HSI (QUADOP, sqdmlsl_laneq, 0) +BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlal_lane, 0) +BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlsl_lane, 0) +BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlal_laneq, 0) +BUILTIN_VSD_HSI (TERNOP_LANE, sqdmlsl_laneq, 0) BUILTIN_VQ_HSI (TERNOP, sqdmlal2, 0) BUILTIN_VQ_HSI (TERNOP, sqdmlsl2, 0) - BUILTIN_VQ_HSI (QUADOP, sqdmlal2_lane, 0) - BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_lane, 0) - BUILTIN_VQ_HSI (QUADOP, sqdmlal2_laneq, 0) - BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_laneq, 0) +BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlal2_lane, 0) +BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlsl2_lane, 0) +BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlal2_laneq, 0) +BUILTIN_VQ_HSI (TERNOP_LANE, sqdmlsl2_laneq, 0) BUILTIN_VQ_HSI (TERNOP, sqdmlal2_n, 0) BUILTIN_VQ_HSI (TERNOP, sqdmlsl2_n, 0) /* Implemented by aarch64_sqdmll. */ Index: gcc/testsuite/gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c =================================================================== +++ gcc/testsuite/gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c (working copy) @@ -0,0 +1,54 @@ +/* { dg-do compile } */ + +#include "arm_neon.h" + +int32x4_t +foo (int32x4_t a, int16x4_t b, int16x4_t c, int d) +{ + return vqdmlal_lane_s16 (a, b, c, d); +} + +int32x4_t +foo1 (int32x4_t a, int16x4_t b, int16x8_t c, int d) +{ + return vqdmlal_laneq_s16 (a, b, c, d); +} + +int32x4_t +foo2 (int32x4_t a, int16x4_t b, int16x4_t c, int d) +{ + return vqdmlsl_lane_s16 (a, b, c, d); +} + +int32x4_t +foo3 (int32x4_t a, int16x4_t b, int16x8_t c, int d) +{ + return vqdmlsl_laneq_s16 (a, b, c, d); +} + +int32x4_t +foo4 (int32x4_t a, int16x8_t b, int16x4_t c, int d) +{ + return vqdmlal_high_lane_s16 (a, b, c, d); +} + +int32x4_t +foo5 (int32x4_t a, int16x8_t b, int16x4_t c, int d) +{ + return vqdmlsl_high_lane_s16 (a, b, c, d); +} + +int32x4_t +foo6 (int32x4_t a, int16x8_t b, int16x8_t c, int d) +{ + return vqdmlal_high_laneq_s16 (a, b, c, d); +} + +int32x4_t +foo7 (int32x4_t a, int16x8_t b, int16x8_t c, int d) +{ + return vqdmlsl_high_laneq_s16 (a, b, c, d); +} + + +/* { dg-excess-errors "incompatible type for argument" } */