On Mon, Jun 15, 2015 at 01:37:48PM -0500, Segher Boessenkool wrote: > > sub-rtx's in rtx_cost are > > summed in order rather than reverse order so that the mode from an > > earlier operand can be used for a later operand lacking a mode. This > > is for ZERO_EXTEND and similar codes where the sub-rtx mode is > > different to the outer mode. Canonicalization puts const_int operands > > after other operands. > > Not always; only for commutative operations, or operations that can be > swapped (like comparisons). As a counterexample, see PowerPC subfic > (imm - reg).
Hmm. Actually, on thinking over this some more I reckon I don't need the change for sub-rtx's at all. Clearly not for ZERO_EXTEND which only has one operand. To take your counter example, (zero_extend (minus (const_int) (reg))) will use the mode of the MINUS for the CONST_INT. Please consider that part of the patch removed. > > The testing showed some pre-existing bugs.. > > > > arc-elf dies on attempting to assemble first libgcc file, due to gas > > not understanding the options being passed by gcc. Apparently no one > > cared enough to push gas changes upstream. > > You need to configure it with --with-cpu. Not that that makes any > sense :-) Yes, I wouldn't have got past configure without adding --with-cpu. --with-cpu doesn't solve the problem I'm talking about, which is that you need an assembler built from a branch. Mainline arc binutils does not support mainline arc gcc. -- Alan Modra Australia Development Lab, IBM
