[PATCH 1/2] Add mask to specify which LEON3 targets support CASA

[Daniel Cederman]

Not all LEON3 support the CASA instruction. This patch provides a mask
that can be used to specify which LEON3 targets that support CASA.

gcc/ChangeLog:

2015-06-22  Daniel Cederman  <ceder...@gaisler.com>

        * config/sparc/sparc.c (sparc_option_override): Mark CPU targets
          leon3 and leon3v7 as supporting the CASA instruction
        * config/sparc/sparc.opt: Add mask specifying that the LEON3
          supports the CASA instruction (MASK_LEON3_CASA)
        * config/sparc/sync.md: Only generate CASA for V9 and targets
          with the MASK_LEON3_CASA mask
---
 gcc/config/sparc/sparc.c   | 4 ++--
 gcc/config/sparc/sparc.opt | 3 +++
 gcc/config/sparc/sync.md   | 6 +++---
 3 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 995a769..205e3cb 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -1280,8 +1280,8 @@ sparc_option_override (void)
     { "supersparc",    MASK_ISA, MASK_V8 },
     { "hypersparc",    MASK_ISA, MASK_V8|MASK_FPU },
     { "leon",          MASK_ISA, MASK_V8|MASK_LEON|MASK_FPU },
-    { "leon3",         MASK_ISA, MASK_V8|MASK_LEON3|MASK_FPU },
-    { "leon3v7",       MASK_ISA, MASK_LEON3|MASK_FPU },
+    { "leon3",         MASK_ISA, MASK_V8|MASK_LEON3|MASK_FPU|MASK_LEON_CASA },
+    { "leon3v7",       MASK_ISA, MASK_LEON3|MASK_FPU|MASK_LEON_CASA },
     { "sparclite",     MASK_ISA, MASK_SPARCLITE },
     /* The Fujitsu MB86930 is the original sparclite chip, with no FPU.  */
     { "f930",          MASK_ISA|MASK_FPU, MASK_SPARCLITE },
diff --git a/gcc/config/sparc/sparc.opt b/gcc/config/sparc/sparc.opt
index 5c7f546..e6caa95 100644
--- a/gcc/config/sparc/sparc.opt
+++ b/gcc/config/sparc/sparc.opt
@@ -228,6 +228,9 @@ Mask(LEON)
 Mask(LEON3)
 ;; Generate code for LEON3
 
+Mask(LEON_CASA)
+;; Generate CAS instruction for LEON
+
 Mask(SPARCLITE)
 ;; Generate code for SPARClite
 
diff --git a/gcc/config/sparc/sync.md b/gcc/config/sparc/sync.md
index 2fabff5..8e1baee 100644
--- a/gcc/config/sparc/sync.md
+++ b/gcc/config/sparc/sync.md
@@ -181,7 +181,7 @@
    (match_operand:SI 5 "const_int_operand" "")         ;; is_weak
    (match_operand:SI 6 "const_int_operand" "")         ;; mod_s
    (match_operand:SI 7 "const_int_operand" "")]                ;; mod_f
-  "(TARGET_V9 || TARGET_LEON3)
+  "(TARGET_V9 || TARGET_LEON_CASA)
    && (<MODE>mode != DImode || TARGET_ARCH64 || TARGET_V8PLUS)"
 {
   sparc_expand_compare_and_swap (operands);
@@ -197,7 +197,7 @@
             [(match_operand:I48MODE 2 "register_operand" "")
              (match_operand:I48MODE 3 "register_operand" "")]
             UNSPECV_CAS))])]
-  "TARGET_V9 || TARGET_LEON3"
+  "TARGET_V9 || TARGET_LEON_CASA"
   "")
 
 (define_insn "*atomic_compare_and_swap<mode>_1"
@@ -220,7 +220,7 @@
          [(match_operand:SI 2 "register_operand" "r")
           (match_operand:SI 3 "register_operand" "0")]
          UNSPECV_CAS))]
-  "TARGET_LEON3"
+  "TARGET_LEON_CASA"
 {
   if (TARGET_SV_MODE)
     return "casa\t%1 0xb, %2, %0"; /* ASI for supervisor data space.  */
-- 
2.4.3