> On Jul 27, 2015, at 2:26 AM, Jiong Wang <jiong.w...@arm.com> wrote:
>
>
> Andrew Pinski writes:
>
>>> On Fri, Jul 24, 2015 at 2:07 AM, Jiong Wang <jiong.w...@arm.com> wrote:
>>>
>>> James Greenhalgh writes:
>>>
>>>>> On Wed, May 20, 2015 at 01:35:41PM +0100, Jiong Wang wrote:
>>>>> Current IRA still use both target macros in a few places.
>>>>>
>>>>> Tell IRA to use the order we defined rather than with it's own cost
>>>>> calculation. Allocate caller saved first, then callee saved.
>>>>>
>>>>> This is especially useful for LR/x30, as it's free to allocate and is
>>>>> pure caller saved when used in leaf function.
>>>>>
>>>>> Haven't noticed significant impact on benchmarks, but by grepping some
>>>>> keywords like "Spilling", "Push.*spill" etc in ira rtl dump, the number
>>>>> is smaller.
>>>>>
>>>>> OK for trunk?
>>>>
>>>> OK, sorry for the delay.
>>>>
>>>> It might be mail client mangling, but please check that the trailing
>>>> slashes
>>>> line up in the version that gets committed.
>>>>
>>>> Thanks,
>>>> James
>>>>
>>>>> 2015-05-19 Jiong. Wang <jiong.w...@arm.com>
>>>>>
>>>>> gcc/
>>>>> PR 63521
>>>>> * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
>>>>> (HONOR_REG_ALLOC_ORDER): Define.
>>>
>>> Patch reverted.
>>
>> I did not see a reason why this patch was reverted. Maybe I am
>> missing an email or something.
>
> There are several execution regressions under gcc testsuite, although as
> far as I can see it's this patch exposed hidding bugs in those
> testcases, but there might be one other issue, so to be conservative, I
> temporarily reverted this patch.
If you are talking about:
gcc.target/aarch64/aapcs64/func-ret-2.c execution
Etc.
These test cases are too dependent on the original register allocation order
and really can be safely ignored. Really these three tests should be moved or
written in a more sane way.
Thanks,
Andrew
>
>>
>> Thanks,
>> Andrew
>>
>>
>
> --
> Regards,
> Jiong
>