On Tue, Jul 28, 2015 at 12:25:06PM +0100, Alan Lawrence wrote: > gcc/ChangeLog: > > * config/aarch64/aarch64-builtins.c (aarch64_fp16_type_node): New. > (aarch64_init_builtins): Make aarch64_fp16_type_node, use for __fp16. > > * config/aarch64/aarch64-modes.def: Add HFmode. > > * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define > __ARM_FP16_FORMAT_IEEE and __ARM_FP16_ARGS. Set bit 1 of __ARM_FP. > > * config/aarch64/aarch64.c (aarch64_init_libfuncs, > aarch64_promoted_type): New. > > (aarch64_float_const_representable_p): Disable HFmode. > (aarch64_mangle_type): Mangle half-precision floats to "Dh". > (TARGET_PROMOTED_TYPE): Define to aarch64_promoted_type. > (TARGET_INIT_LIBFUNCS): Define to aarch64_init_libfuncs. > > * config/aarch64/aarch64.md (mov<mode>): Include HFmode using GPF_F16. > (movhf_aarch64, extendhfsf2, extendhfdf2, truncsfhf2, truncdfhf2): New. > > * config/aarch64/iterators.md (GPF_F16): New. > > > gcc/testsuite/ChangeLog: > > * gcc.target/aarch64/f16_movs_1.c: New test.
OK with some minor tweaks to some comments. > diff --git a/gcc/config/aarch64/aarch64-modes.def > b/gcc/config/aarch64/aarch64-modes.def > index b17b90d..c30059b 100644 > --- a/gcc/config/aarch64/aarch64-modes.def > +++ b/gcc/config/aarch64/aarch64-modes.def > @@ -36,6 +36,10 @@ CC_MODE (CC_DLTU); > CC_MODE (CC_DGEU); > CC_MODE (CC_DGTU); > > +/* Half-precision floating point for arm_neon.h float16_t. */ > +FLOAT_MODE (HF, 2, 0); > +ADJUST_FLOAT_FORMAT (HF, &ieee_half_format); > + Minor technicality. This is for the __fp16 type, which arm_neon.h aliases to float16_t. As __fp16 is the name given in the AAPCS64 for the type, I'd prefer if we used that in the comments documenting the feature. So, s/arm_neon.h float16_t/__fp16/ > +/* Implement TARGET_PROMOTED_TYPE to promote float16 to 32 bits. */ Reword as something like: To promote "__fp16" to "float" > #undef TARGET_ADDRESS_COST > #define TARGET_ADDRESS_COST aarch64_address_cost > > diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h > index a22c6e4..44fe4f9 100644 > --- a/gcc/config/aarch64/aarch64.h > +++ b/gcc/config/aarch64/aarch64.h > @@ -57,7 +57,9 @@ > if (TARGET_FLOAT) \ > { \ > builtin_define ("__ARM_FEATURE_FMA"); \ > - builtin_define_with_int_value ("__ARM_FP", 0x0C); \ > + builtin_define_with_int_value ("__ARM_FP", 0x0E); \ > + builtin_define ("__ARM_FP16_FORMAT_IEEE"); \ > + builtin_define ("__ARM_FP16_ARGS"); \ You'll be in competition with Kyrill's changes for target attributes here, he moves these all to a new file. > diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md > index 498358a..a6b351b 100644 > --- a/gcc/config/aarch64/iterators.md > +++ b/gcc/config/aarch64/iterators.md > @@ -38,6 +38,9 @@ > ;; Iterator for General Purpose Floating-point registers (32- and 64-bit > modes) > (define_mode_iterator GPF [SF DF]) > > +;; Iterator for General Purpose Float regs, inc float16_t. > +(define_mode_iterator GPF_F16 [HF SF DF]) > + s/float16_t/__fp16/ Thanks, James