Ping.
https://gcc.gnu.org/ml/gcc-patches/2015-07/msg02037.html
Thanks,
Kyrill
On 24/07/15 11:55, Kyrill Tkachov wrote:
Hi all,
This third patch implements the same algorithm as patch 1/3 but for arm.
That is, for X % N where N is a power of 2 we do:
rsbs r1, r0, #0
and r0, r0, #(N - 1)
and r1, r1, #(N - 1)
rsbpl r0, r1, #0
For the special case where N is 2 we do the shorter:
cmp r0, #0
and r0, r0, #1
rsblt r0, r0, #0
Note that for the final conditional negate we expand to an IF_THEN_ELSE of a NEG
rather than a cond_exec rtx because the lra dataflow analysis doesn't always
deal
with cond_execs correctly. The splitters fixed in patch 2/3 then break it into a
cond_exec after reload, so it all works out.
Bootstrapped and tested on arm, with both ARM and Thumb2 states.
Tests are added and shared with aarch64.
Ok for trunk?
Thanks,
Kyrill
2015-07-24 Kyrylo Tkachov <[email protected]>
* config/arm/arm.md (*subsi3_compare0): Rename to...
(subsi3_compare0): ... This.
(*arm_andsi3_insn): Rename to...
(arm_andsi3_insn): ... This.
(modsi3): New define_expand.
* config/arm/arm.c (arm_new_rtx_costs, MOD case): Handle case
operand is power of 2.
2015-07-24 Kyrylo Tkachov <[email protected]>
* gcc.target/aarch64/mod_2.x: New file.
* gcc.target/aarch64/mod_256.x: Likewise.
* gcc.target/arm/mod_2.c: New test.
* gcc.target/arm/mod_256.c: Likewise.
* gcc.target/aarch64/mod_2.c: Likewise.
* gcc.target/aarch64/mod_256.c: Likewise.
