On 11/20/2015 11:43 AM, Jakub Jelinek wrote:
+(define_expand "uaddv<mode>4"
+ [(parallel [(set (reg:CCC FLAGS_REG)
+ (compare:CCC
+ (plus:SWI (match_dup 1) (match_dup 2))
+ (match_dup 1)))
+ (set (match_dup 0)
+ (plus:SWI (match_dup 1) (match_dup 2)))])
+ (set (pc) (if_then_else
+ (ne (reg:CCC FLAGS_REG) (const_int 0))
+ (label_ref (match_operand 3))
+ (pc)))]
+ ""
+{
+ ix86_fixup_binary_operands_no_copy (PLUS, <MODE>mode, operands);
+})
Do we need this one on i?86? I'm not against adding it to optabs, so that
other targets have a way to improve that, but doesn't combine handle this
case on i?86 already well?
Perhaps combine can do the job, but in my option it's better to have the optab
than not. Especially when it's so easy to add in this case.
+(define_expand "usubv<mode>4"
+ [(parallel [(set (reg:CC FLAGS_REG)
+ (compare:CC (match_dup 1) (match_dup 2)))
+ (set (match_dup 0)
+ (minus:SWI (match_dup 1) (match_dup 2)))])
+ (set (pc) (if_then_else
+ (ltu (reg:CC FLAGS_REG) (const_int 0))
+ (label_ref (match_operand 3))
+ (pc)))]
If this works, it will be nice, I thought we'll need a new CC*mode.
No, we just need to re-use the existing insn that performs the low half of a
double-word subtraction operation.
Eric has just submitted a documentation path that documented the
{add,sub,mul,umul}v<mode>4 and negv<mode>3 patterns, so this should be
applied on top of that.
Ok, I'll look out for that.
r~
