On 17/12/15 14:49, Segher Boessenkool wrote:
Hi Kyrill,
On Tue, Dec 15, 2015 at 05:07:41PM +0000, Kyrill Tkachov wrote:
As part of the war on conditional compilation here's an #if check on
WORD_REGISTER_OPERATIONS that
seems to have been missed out.
Bootstrapped and tested on arm, aarch64, x86_64.
Is it still ok to commit these kinds of conditional compilation conversions?
You could say it is a bugfix, a missed case in the conversion ;-)
diff --git a/gcc/combine.c b/gcc/combine.c
index
8601d8983ce345e2129dd047b3520d98c0582842..0658a6dbc6df6862df662bc7842c13ed06b36b04
100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -11488,10 +11488,10 @@ simplify_comparison (enum rtx_code code, rtx *pop0,
rtx *pop1)
/* Try a few ways of applying the same transformation to both operands. */
while (1)
{
-#if !WORD_REGISTER_OPERATIONS
/* The test below this one won't handle SIGN_EXTENDs on these machines,
so check specially. */
- if (code != GTU && code != GEU && code != LTU && code != LEU
+ if (!WORD_REGISTER_OPERATIONS && code != GTU && code != GEU
+ && code != LTU && code != LEU
Please keep all the code != together, i.e.
+ if (!WORD_REGISTER_OPERATIONS
+ && code != GTU && code != GEU && code != LTU && code != LEU
Okay with that change.
Thanks.
Here's what I'll be committing.
Kyrill
2015-12-21 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* combine.c (simplify_comparison): Convert preprocessor check of
WORD_REGISTER_OPERATIONS into runtime check.
diff --git a/gcc/combine.c b/gcc/combine.c
index dc0d4bd52c717b88608d21dbaffe444eeb68bb2d..36ea6df15010247c96a9fcac1649d3d958d64675 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -11436,10 +11436,10 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
/* Try a few ways of applying the same transformation to both operands. */
while (1)
{
-#if !WORD_REGISTER_OPERATIONS
/* The test below this one won't handle SIGN_EXTENDs on these machines,
so check specially. */
- if (code != GTU && code != GEU && code != LTU && code != LEU
+ if (!WORD_REGISTER_OPERATIONS
+ && code != GTU && code != GEU && code != LTU && code != LEU
&& GET_CODE (op0) == ASHIFTRT && GET_CODE (op1) == ASHIFTRT
&& GET_CODE (XEXP (op0, 0)) == ASHIFT
&& GET_CODE (XEXP (op1, 0)) == ASHIFT
@@ -11459,7 +11459,6 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
op0 = SUBREG_REG (XEXP (XEXP (op0, 0), 0));
op1 = SUBREG_REG (XEXP (XEXP (op1, 0), 0));
}
-#endif
/* If both operands are the same constant shift, see if we can ignore the
shift. We can if the shift is a rotate or if the bits shifted out of
