Hello!
2016-05-02 Uros Bizjak <ubiz...@gmail.com>
* config/i386/predicates.md (nonimm_ssenomem_operand): New predicate.
(register_mixssei387nonimm_operand): Remove predicate.
* config/i386/i386.md (*fop_<mode>_comm): Merge from
*fop_<mode>_comm_mixed and *fop_<mode>_comm_i387. Disable unsupported
alternatives using "enabled" attribute. Also check X87_ENABLE_ARITH
for TARGET_MIX_SSE_I387 alternatives.
(*fop_<mode>_1): Merge from *fop_<mode>_1_mixed and *fop_<mode>_1_i387.
Disable unsupported alternatives using "enabled" attribute. Use
nonimm_ssenomem_operand as operand 1 predicate. Also check
X87_ENABLE_ARITH for TARGET_MIX_SSE_I387 alternatives.
* config/i386/predicates.md (nonimm_ssenomem_operand): New predicate.
(register_mixssei387nonimm_operand): Remove predicate.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Committed to mainline SVN.
Uros.
Index: i386.md
===================================================================
--- i386.md (revision 235693)
+++ i386.md (working copy)
@@ -13989,12 +13989,13 @@
;; Gcc is slightly more smart about handling normal two address instructions
;; so use special patterns for add and mull.
-(define_insn "*fop_<mode>_comm_mixed"
+(define_insn "*fop_<mode>_comm"
[(set (match_operand:MODEF 0 "register_operand" "=f,x,v")
(match_operator:MODEF 3 "binary_fp_operator"
[(match_operand:MODEF 1 "nonimmediate_operand" "%0,0,v")
(match_operand:MODEF 2 "nonimmediate_operand" "fm,xm,vm")]))]
- "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
+ "((SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
+ || (TARGET_80387 && X87_ENABLE_ARITH (<MODE>mode)))
&& COMMUTATIVE_ARITH_P (operands[3])
&& !(MEM_P (operands[1]) && MEM_P (operands[2]))"
"* return output_387_binary_op (insn, operands);"
@@ -14010,26 +14011,18 @@
(set_attr "prefix" "orig,orig,vex")
(set_attr "mode" "<MODE>")
(set (attr "enabled")
- (cond [(eq_attr "alternative" "0")
- (symbol_ref "TARGET_MIX_SSE_I387")
- ]
- (const_string "*")))])
+ (if_then_else
+ (match_test ("SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"))
+ (if_then_else
+ (eq_attr "alternative" "0")
+ (symbol_ref "TARGET_MIX_SSE_I387
+ && X87_ENABLE_ARITH (<MODE>mode)")
+ (const_string "*"))
+ (if_then_else
+ (eq_attr "alternative" "0")
+ (symbol_ref "true")
+ (symbol_ref "false"))))])
-(define_insn "*fop_<mode>_comm_i387"
- [(set (match_operand:MODEF 0 "register_operand" "=f")
- (match_operator:MODEF 3 "binary_fp_operator"
- [(match_operand:MODEF 1 "nonimmediate_operand" "%0")
- (match_operand:MODEF 2 "nonimmediate_operand" "fm")]))]
- "TARGET_80387 && X87_ENABLE_ARITH (<MODE>mode)
- && COMMUTATIVE_ARITH_P (operands[3])
- && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
- "* return output_387_binary_op (insn, operands);"
- [(set (attr "type")
- (if_then_else (match_operand:MODEF 3 "mult_operator")
- (const_string "fmul")
- (const_string "fop")))
- (set_attr "mode" "<MODE>")])
-
(define_insn "*rcpsf2_sse"
[(set (match_operand:SF 0 "register_operand" "=x")
(unspec:SF [(match_operand:SF 1 "nonimmediate_operand" "xm")]
@@ -14042,14 +14035,15 @@
(set_attr "prefix" "maybe_vex")
(set_attr "mode" "SF")])
-(define_insn "*fop_<mode>_1_mixed"
+(define_insn "*fop_<mode>_1"
[(set (match_operand:MODEF 0 "register_operand" "=f,f,x,v")
(match_operator:MODEF 3 "binary_fp_operator"
[(match_operand:MODEF 1
- "register_mixssei387nonimm_operand" "0,fm,0,v")
+ "nonimm_ssenomem_operand" "0,fm,0,v")
(match_operand:MODEF 2
- "nonimmediate_operand" "fm,0,xm,vm")]))]
- "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
+ "nonimmediate_operand" "fm,0,xm,vm")]))]
+ "((SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
+ || (TARGET_80387 && X87_ENABLE_ARITH (<MODE>mode)))
&& !COMMUTATIVE_ARITH_P (operands[3])
&& !(MEM_P (operands[1]) && MEM_P (operands[2]))"
"* return output_387_binary_op (insn, operands);"
@@ -14065,28 +14059,18 @@
(set_attr "prefix" "orig,orig,orig,vex")
(set_attr "mode" "<MODE>")
(set (attr "enabled")
- (cond [(eq_attr "alternative" "0,1")
- (symbol_ref "TARGET_MIX_SSE_I387")
- ]
- (const_string "*")))])
+ (if_then_else
+ (match_test ("SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"))
+ (if_then_else
+ (eq_attr "alternative" "0,1")
+ (symbol_ref "TARGET_MIX_SSE_I387
+ && X87_ENABLE_ARITH (<MODE>mode)")
+ (const_string "*"))
+ (if_then_else
+ (eq_attr "alternative" "0,1")
+ (symbol_ref "true")
+ (symbol_ref "false"))))])
-;; This pattern is not fully shadowed by the pattern above.
-(define_insn "*fop_<mode>_1_i387"
- [(set (match_operand:MODEF 0 "register_operand" "=f,f")
- (match_operator:MODEF 3 "binary_fp_operator"
- [(match_operand:MODEF 1 "nonimmediate_operand" "0,fm")
- (match_operand:MODEF 2 "nonimmediate_operand" "fm,0")]))]
- "TARGET_80387 && X87_ENABLE_ARITH (<MODE>mode)
- && !(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
- && !COMMUTATIVE_ARITH_P (operands[3])
- && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
- "* return output_387_binary_op (insn, operands);"
- [(set (attr "type")
- (if_then_else (match_operand:MODEF 3 "div_operator")
- (const_string "fdiv")
- (const_string "fop")))
- (set_attr "mode" "<MODE>")])
-
;; ??? Add SSE splitters for these!
(define_insn "*fop_<MODEF:mode>_2_i387"
[(set (match_operand:MODEF 0 "register_operand" "=f")
Index: predicates.md
===================================================================
--- predicates.md (revision 235692)
+++ predicates.md (working copy)
@@ -121,11 +121,14 @@
(match_operand 0 "nonmemory_operand")
(match_operand 0 "general_operand")))
-;; Match register operands, include memory operand for TARGET_MIX_SSE_I387.
-(define_predicate "register_mixssei387nonimm_operand"
- (if_then_else (match_test "TARGET_MIX_SSE_I387")
- (match_operand 0 "nonimmediate_operand")
- (match_operand 0 "register_operand")))
+;; Match nonimmediate operands, but exclude memory operands
+;; for TARGET_SSE_MATH if TARGET_MIX_SSE_I387 is not enabled.
+(define_predicate "nonimm_ssenomem_operand"
+ (if_then_else
+ (and (match_test "SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH")
+ (not (match_test "TARGET_MIX_SSE_I387 && X87_ENABLE_ARITH (mode)")))
+ (match_operand 0 "register_operand")
+ (match_operand 0 "nonimmediate_operand")))
;; Match register operands, include memory operand for TARGET_SSE4_1.
(define_predicate "register_sse4nonimm_operand"
