On Mon, Jun 27, 2016 at 08:08:20PM -0400, Michael Meissner wrote: > This patch fixes PR 71667 that I discovered when trying to build the Spec 2006 > xalancbmk benchmark for the Power9. The Altivec indexed memory load/stores > need to go before the D-form (register + offset) load/stores, because they > have > different syntaxes.
I'm not sure what that means? Could you explain a bit more? > PR target/71667 > * config/rs6000/rs6000.md (movdi_internal32): Swap alternatives > for loading Altivec registers so that the indexed case comes > first, and the general case (which includes indexed loads) comes > later. So the general case allows indexed loads as well, but that breaks somehow? > PR target/71667 > * g++.dg/pr71667.C: New test for PR 71667. 20599 lines, can you minimize this a bit? If not, maybe we should just do without testcase here. Segher
