This patch adds a trap pattern to TILEPro/Tile-Gx.  The pattern emits
an instruction bundle that causes a SIGABRT.

Bootstrapped and tested on TILEPro/TILE-Gx hardware, also backported
to GCC 6.

* config/tilegx/tilegx.md (trap): New pattern.
* config/tilepro/tilepro.md (trap): Likewise.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8e2bbdf..259eb02 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,10 @@
 2016-11-22  Walter Lee  <w...@tilera.com>

+       * config/tilegx/tilegx.md (trap): New pattern.
+       * config/tilepro/tilepro.md (trap): Likewise.
+
+2016-11-22  Walter Lee  <w...@tilera.com>
+
        * config/tilegx/tilegx.md (*zero_extract): Use
        define_insn_and_split instead of define_insn; Handle pos + size >
        64.
diff --git a/gcc/config/tilegx/tilegx.md b/gcc/config/tilegx/tilegx.md
index 3ad5a87..eccdd28 100644
--- a/gcc/config/tilegx/tilegx.md
+++ b/gcc/config/tilegx/tilegx.md
@@ -2773,6 +2773,12 @@
   "nop"
   [(set_attr "type" "Y01")])

+(define_insn "trap"
+  [(trap_if (const_int 1) (const_int 0))]
+  ""
+  "raise; moveli zero, 6"
+  [(set_attr "type" "cannot_bundle")])
+
 ^L
 ;;
 ;; Conditional branches
diff --git a/gcc/config/tilepro/tilepro.md b/gcc/config/tilepro/tilepro.md
index 6493b06..d1536ed 100644
--- a/gcc/config/tilepro/tilepro.md
+++ b/gcc/config/tilepro/tilepro.md
@@ -1578,6 +1578,12 @@
   "nop"
   [(set_attr "type" "Y01")])

+(define_insn "trap"
+  [(trap_if (const_int 1) (const_int 0))]
+  ""
+  "raise; moveli zero, 6"
+  [(set_attr "type" "cannot_bundle")])
+
 ^L
 ;;
 ;; Conditional branches

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