Hi,
On Wed, 30 Nov 2016, Dominik Vogt wrote:
> On Wed, Nov 23, 2016 at 02:22:07PM +0000, Segher Boessenkool wrote:
> > r242414, for PR77881, introduces some bugs (PR78390, PR78438, PR78477).
> > It all has the same root cause: that patch makes combine convert every
> > lowpart subreg of a logical shift right to a zero_extract. This cannot
> > work at all if it is not a constant shift, and it has to be a bit more
> > careful exactly which bits it extracts.
> >
> > Tested on powerpc64-linux {-m32,-m64} (where it fixes the regression
> > c-c++-common/torture/vector-compare-1.c fails at -O1, and where it also
> > has a bootstrap failure with some other patches). Also tested that the
> > x86_64 compiler still generates the wanted code for the PR77881 testcase.
>
> Is this a side effect of the patch series?
What is "this"?
> Trying 7 -> 9:
> ...
> Failed to match this instruction:
> (set (reg:SI 68 [ v_or ])
> (ior:SI (subreg:SI (zero_extract:DI (reg:DI 2 %r2 [ v_x ])
> ^^^^^^^^^^^^^^^^^^^^^^^^^^
> (const_int 16 [0x10])
> (const_int 0 [0])) 4)
> ^^^
> (reg:SI 70 [ v_and1 ])))
>
> Shouldn't this be simply
>
> ...
> (ior:SI (zero_extract:SI (reg:DI) (16) (0)))
> ...
I don't think mode-changing _extracts are valid in this context. From the
docu:
`(sign_extract:M LOC SIZE POS)'
...
The mode M is the same as the mode that would be used for LOC if
it were a register.
Probably it could be made to work just fine, but I'm not sure it'd be
worth much, as then the targets would need to care for mode-changes
occuring not just through subregs as usual, but also through extracts.
Ciao,
Michael.
