I discovered that my change in subversion id 242679, used a 'Y' constraint for
movdi, when it should be using a 'wY'. 'Y' is for gpr load/stores, and it
allows register+register address, while 'wY' is for the new register+offset
instructions added in ISA 3.0, which does not include register+register
addressing.
The previous code before 242679 used 'wY', but I deleted the 'w' by accident.
This bug showed up in compiling PUGHReduce/Reduction.c in the cactusADM Spec
2006 benchmark suite. I have verified that this fixes the problem.
Assuming the bootstrap and make check that I'm running right now don't cause
any regressions, can I check the patch into the trunk?
2016-12-01 Michael Meissner <meiss...@linux.vnet.ibm.com>
PR target/78639
* config/rs6000/rs6000.md (movdi_internal64): Fix typo in
subversion id 242679 that causes the wrong store instruction to be
generated if a DImode is in an Altivec register using REG+REG
addressing.
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md (revision 243133)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -8239,7 +8239,7 @@ (define_split
(define_insn "*movdi_internal64"
[(set (match_operand:DI 0 "nonimmediate_operand"
"=Y, r, r, r, r, r,
- ^m, ^d, ^d, ^Y, $Z, $wb,
+ ^m, ^d, ^d, ^wY, $Z, $wb,
$wv, ^wi, *wo, *wo, *wv, *wi,
*wi, *wv, *wv, r, *h, *h,
?*r, ?*wg, ?*r, ?*wj")
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
