GCC Maintainers:
I have squashed the following two patches from mainline
commit r244943 Remove bogus entries for the P8V_BUILTIN_VEC_VGBBD
built-ins
commit r244904 Fix order of entries for ALTIVEC_BUILTIN_VEC_PACKS
and P8V_BUILTIN_VEC_VGBBD.
and back ported them to the GCC 6 branch. The patch fixes the issue
of the vec_packs built-in entries not being contiguous and removes the
bogus entries for the vec_vgbbd built-in.
The patch has been tested on powerpc64le-unknown-linux-gnu (Power 8 LE)
with no regressions.
Is the patch OK for gcc 6 branch?
Carl Love
---------------------------------------------------------------------
gcc/ChangeLog:
2017-02-03 Carl Love <c...@us.ibm.com>
* config/rs6000/rs6000-c (altivec_overloaded_builtins): Fix order
of entries for ALTIVEC_BUILTIN_VEC_PACKS. Remove bogus entries
for P8V_BUILTIN_VEC_VGBBD.
gcc/testsuite/ChangeLog:
2017-02-03 Carl Love <c...@us.ibm.com>
* gcc.target/powerpc/builtins-3-p8.c: Add new testfile for missing
vec_packs built-in tests.
---
gcc/config/rs6000/rs6000-c.c | 13 ++++--------
gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c | 26 ++++++++++++++++++++++++
2 files changed, 30 insertions(+), 9 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index 9eb6d54..474b48c 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -2133,14 +2133,14 @@ const struct altivec_builtin_types
altivec_overloaded_builtins[] = {
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI,
RS6000_BTI_unsigned_V4SI, 0 },
{ ALTIVEC_BUILTIN_VEC_PACKS, ALTIVEC_BUILTIN_VPKSWSS,
RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
- { ALTIVEC_BUILTIN_VEC_VPKSWSS, ALTIVEC_BUILTIN_VPKSWSS,
- RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
- { ALTIVEC_BUILTIN_VEC_VPKUWUS, ALTIVEC_BUILTIN_VPKUWUS,
- RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI,
RS6000_BTI_unsigned_V4SI, 0 },
{ ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKUDUS,
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V2DI,
RS6000_BTI_unsigned_V2DI, 0 },
{ ALTIVEC_BUILTIN_VEC_PACKS, P8V_BUILTIN_VPKSDSS,
RS6000_BTI_V4SI, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 },
+ { ALTIVEC_BUILTIN_VEC_VPKSWSS, ALTIVEC_BUILTIN_VPKSWSS,
+ RS6000_BTI_V8HI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+ { ALTIVEC_BUILTIN_VEC_VPKUWUS, ALTIVEC_BUILTIN_VPKUWUS,
+ RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V4SI,
RS6000_BTI_unsigned_V4SI, 0 },
{ ALTIVEC_BUILTIN_VEC_VPKSHSS, ALTIVEC_BUILTIN_VPKSHSS,
RS6000_BTI_V16QI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
{ ALTIVEC_BUILTIN_VEC_VPKUHUS, ALTIVEC_BUILTIN_VPKUHUS,
@@ -4550,11 +4550,6 @@ const struct altivec_builtin_types
altivec_overloaded_builtins[] = {
{ P8V_BUILTIN_VEC_VUPKLSW, P8V_BUILTIN_VUPKLSW,
RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V4SI, 0, 0 },
- { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
- RS6000_BTI_V16QI, 0, 0, 0 },
- { P8V_BUILTIN_VEC_VGBBD, P8V_BUILTIN_VGBBD,
- RS6000_BTI_unsigned_V16QI, 0, 0, 0 },
-
{ P9V_BUILTIN_VEC_VSLV, P9V_BUILTIN_VSLV,
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
RS6000_BTI_unsigned_V16QI, 0 },
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c
b/gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c
new file mode 100644
index 0000000..2c06ea7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-3-p8.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+vector signed int
+test_vsi_packs_vsll_vsll (vector signed long long x,
+ vector signed long long y)
+{
+ return vec_packs (x, y);
+}
+
+vector unsigned int
+test_vui_packs_vull_vull (vector unsigned long long x,
+ vector unsigned long long y)
+{
+ return vec_packs (x, y);
+}
+
+/* Expected test results:
+ test_vsi_packs_vsll_vsll 1 vpksdss
+ test_vui_packs_vull_vull 1 vpkudus */
+
+/* { dg-final { scan-assembler-times "vpksdss" 1 } } */
+/* { dg-final { scan-assembler-times "vpkudus" 1 } } */
--
1.9.1
