This is a regression introduced on the mainline by the switch to LRA because
of a couple of left-over U constraints in config/sparc/sync.md.
Bootstrapped/regtested on SPARC/Solaris, applied on the mainline.
2017-02-05 Eric Botcazou <ebotca...@adacore.com>
PR target/79353
* config/sparc/sync.md (atomic_loaddi_1): Replace 'U' constraint with
'r', 'm' constraint with 'T' and !TARGET_ARCH64 with TARGET_ARCH32.
(atomic_storedi_1): Likewise.
2017-02-05 Eric Botcazou <ebotca...@adacore.com>
* gcc.target/sparc/20170205-1.c: New test.
--
Eric Botcazou/* PR target/79363 */
/* Reported by John Paul Adrian Glaubitz <glaub...@physik.fu-berlin.de> */
/* { dg-do compile } */
/* { dg-options "-O2 -fPIC -mcpu=v8" } */
struct d { long long h; };
struct c { struct d *e; };
int f, g;
extern void bar (long long *);
extern int baz (long long *, int);
void foo (struct c *desc)
{
int begin, end, j;
long long k, l, h;
for (;;) {
for (;;)
break;
for (;;) {
j++;
l = desc->e[j].h;
for (;;) {
bar(&l);
end = h = begin / 2;
if (baz(&h, g))
begin = f;
break;
}
if (end) {
__atomic_store_n(&k, end, 5);
break;
}
}
}
}
Index: config/sparc/sync.md
===================================================================
--- config/sparc/sync.md (revision 245124)
+++ config/sparc/sync.md (working copy)
@@ -133,10 +133,10 @@ (define_expand "atomic_load<mode>"
})
(define_insn "atomic_loaddi_1"
- [(set (match_operand:DI 0 "register_operand" "=U,?*f")
- (unspec:DI [(match_operand:DI 1 "memory_operand" "m,m")]
+ [(set (match_operand:DI 0 "register_operand" "=r,?*f")
+ (unspec:DI [(match_operand:DI 1 "memory_operand" "T,T")]
UNSPEC_ATOMIC))]
- "!TARGET_ARCH64"
+ "TARGET_ARCH32"
"ldd\t%1, %0"
[(set_attr "type" "load,fpload")])
@@ -160,11 +160,11 @@ (define_expand "atomic_store<mode>"
})
(define_insn "atomic_storedi_1"
- [(set (match_operand:DI 0 "memory_operand" "=m,m,m")
+ [(set (match_operand:DI 0 "memory_operand" "=T,T,T")
(unspec:DI
- [(match_operand:DI 1 "register_or_v9_zero_operand" "J,U,?*f")]
+ [(match_operand:DI 1 "register_or_v9_zero_operand" "J,r,?*f")]
UNSPEC_ATOMIC))]
- "!TARGET_ARCH64"
+ "TARGET_ARCH32"
"@
stx\t%r1, %0
std\t%1, %0
