We unnecessarily align data to 8 byte alignments even when -Os is
specified. This brings the logic in the AArch64 backend more in line
with the ARM backend and helps gain some image size in a few places.
Caught by an internal report on the size of rodata sections being high
with aarch64 gcc.
* config/aarch64/aarch64.h (AARCH64_EXPAND_ALIGNMENT): New.
(DATA_ALIGNMENT): Update to use AARCH64_EXPAND_ALIGNMENT.
(LOCAL_ALIGNMENT): Update to use AARCH64_EXPAND_ALIGNMENT.
Bootstrapped and regression tested on aarch64-none-linux-gnu with no
regressions.
Ok to commit ?
cheers
Ramana
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index e4fb96f..95907b2 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -98,14 +98,24 @@
&& (ALIGN) < BITS_PER_WORD) \
? BITS_PER_WORD : ALIGN)
-#define DATA_ALIGNMENT(EXP, ALIGN) \
- ((((ALIGN) < BITS_PER_WORD) \
- && (TREE_CODE (EXP) == ARRAY_TYPE \
- || TREE_CODE (EXP) == UNION_TYPE \
- || TREE_CODE (EXP) == RECORD_TYPE)) \
- ? BITS_PER_WORD : (ALIGN))
-
-#define LOCAL_ALIGNMENT(EXP, ALIGN) DATA_ALIGNMENT(EXP, ALIGN)
+/* Align definitions of arrays, unions and structures so that
+ initializations and copies can be made more efficient. This is not
+ ABI-changing, so it only affects places where we can see the
+ definition. Increasing the alignment tends to introduce padding,
+ so don't do this when optimizing for size/conserving stack space. */
+#define AARCH64_EXPAND_ALIGNMENT(COND, EXP, ALIGN) \
+ (((COND) && ((ALIGN) < BITS_PER_WORD)
\
+ && (TREE_CODE (EXP) == ARRAY_TYPE \
+ || TREE_CODE (EXP) == UNION_TYPE \
+ || TREE_CODE (EXP) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
+
+/* Align global data. */
+#define DATA_ALIGNMENT(EXP, ALIGN) \
+ AARCH64_EXPAND_ALIGNMENT (!optimize_size, EXP, ALIGN)
+
+/* Similarly, make sure that objects on the stack are sensibly aligned. */
+#define LOCAL_ALIGNMENT(EXP, ALIGN) \
+ AARCH64_EXPAND_ALIGNMENT (!flag_conserve_stack, EXP, ALIGN)
#define STRUCTURE_SIZE_BOUNDARY 8
