-mcpu automatically enables features that have a specific -mxxx switch, even
if the corresponding -mno-xxx switch is specified. The only exception is the
-mfpu/-mno-fpu switch.
This patch adds more exceptions (-mhard-float, -mvis, -mvis2, -mvis3, -mvis4,
-mcbcond, -mfmaf, -mpopc and -msubxc) and fixes gcc.target/sparc/overflow-4.c
with -mcpu=niagara3 or later.
Tested on SPARC64/Linux, applied on mainline and 7 branch.
2017-06-14 Eric Botcazou <ebotca...@adacore.com>
* config/sparc/sparc.h (MASK_ISA): Add MASK_LEON and MASK_LEON3.
(MASK_FEATURES): New macro.
* config/sparc/sparc.c (sparc_option_override): Remove the special
handling of -mfpu and generalize it to all MASK_FEATURES switches.
2017-06-14 Eric Botcazou <ebotca...@adacore.com>
* gcc.target/sparc/overflow-4.c: Add -mno-vis3.
--
Eric BotcazouIndex: config/sparc/sparc.c
===================================================================
--- config/sparc/sparc.c (revision 249091)
+++ config/sparc/sparc.c (working copy)
@@ -1341,7 +1341,6 @@ sparc_option_override (void)
};
const struct cpu_table *cpu;
unsigned int i;
- int fpu;
if (sparc_debug_string != NULL)
{
@@ -1433,8 +1432,6 @@ sparc_option_override (void)
call_used_regs [i] = 1;
}
- fpu = target_flags & MASK_FPU; /* save current -mfpu status */
-
/* Set the default CPU. */
if (!global_options_set.x_sparc_cpu_and_features)
{
@@ -1473,22 +1470,18 @@ sparc_option_override (void)
#ifndef HAVE_AS_LEON
& ~(MASK_LEON | MASK_LEON3)
#endif
+ & ~(target_flags_explicit & MASK_FEATURES)
);
- /* If -mfpu or -mno-fpu was explicitly used, don't override with
- the processor default. */
- if (target_flags_explicit & MASK_FPU)
- target_flags = (target_flags & ~MASK_FPU) | fpu;
-
- /* -mvis2 implies -mvis */
+ /* -mvis2 implies -mvis. */
if (TARGET_VIS2)
target_flags |= MASK_VIS;
- /* -mvis3 implies -mvis2 and -mvis */
+ /* -mvis3 implies -mvis2 and -mvis. */
if (TARGET_VIS3)
target_flags |= MASK_VIS2 | MASK_VIS;
- /* -mvis4 implies -mvis3, -mvis2 and -mvis */
+ /* -mvis4 implies -mvis3, -mvis2 and -mvis. */
if (TARGET_VIS4)
target_flags |= MASK_VIS3 | MASK_VIS2 | MASK_VIS;
@@ -1499,15 +1492,14 @@ sparc_option_override (void)
| MASK_FMAF);
/* -mvis assumes UltraSPARC+, so we are sure v9 instructions
- are available.
- -m64 also implies v9. */
+ are available; -m64 also implies v9. */
if (TARGET_VIS || TARGET_ARCH64)
{
target_flags |= MASK_V9;
target_flags &= ~(MASK_V8 | MASK_SPARCLET | MASK_SPARCLITE);
}
- /* -mvis also implies -mv8plus on 32-bit */
+ /* -mvis also implies -mv8plus on 32-bit. */
if (TARGET_VIS && ! TARGET_ARCH64)
target_flags |= MASK_V8PLUS;
Index: config/sparc/sparc.h
===================================================================
--- config/sparc/sparc.h (revision 249091)
+++ config/sparc/sparc.h (working copy)
@@ -423,10 +423,15 @@ extern enum cmodel sparc_cmodel;
#define WCHAR_TYPE_SIZE 16
/* Mask of all CPU selection flags. */
-#define MASK_ISA \
- (MASK_SPARCLITE + MASK_SPARCLET \
+#define MASK_ISA \
+ (MASK_SPARCLITE + MASK_SPARCLET + MASK_LEON + MASK_LEON3 \
+ MASK_V8 + MASK_V9 + MASK_DEPRECATED_V8_INSNS)
+/* Mask of all CPU feature flags. */
+#define MASK_FEATURES \
+ (MASK_FPU + MASK_HARD_QUAD + MASK_VIS + MASK_VIS2 + MASK_VIS3 \
+ + MASK_VIS4 + MASK_CBCOND + MASK_FMAF + MASK_POPC + MASK_SUBXC)
+
/* TARGET_HARD_MUL: Use 32-bit hardware multiply instructions but not %y. */
#define TARGET_HARD_MUL \
(TARGET_SPARCLITE || TARGET_SPARCLET \
Index: testsuite/gcc.target/sparc/overflow-4.c
===================================================================
--- testsuite/gcc.target/sparc/overflow-4.c (revision 249091)
+++ testsuite/gcc.target/sparc/overflow-4.c (working copy)
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O" } */
+/* { dg-options "-O -mno-vis3" } */
/* { dg-require-effective-target lp64 } */
#include <stdbool.h>
