Hi Mike, On Mon, Aug 28, 2017 at 02:50:02PM -0400, Michael Meissner wrote: > When I added the optimization for loading 32-bit values directly into the > vector registers from memory to convert to IEEE 128-bit floating point, I > forgot to make sure the address did not have PRE_INCREMENT, etc. addressing.
> * config/rs6000/rs6000.md (float_<mode>si2_hw): If register > allocation hasn't been done, make sure the memory address is > X-FORM (register+register). > (floatuns_<mode>si2_hw2): Likewise. Why is it okay after RA but not before? > --- gcc/config/rs6000/rs6000.md (revision 251358) > +++ gcc/config/rs6000/rs6000.md (working copy) > @@ -14505,6 +14505,9 @@ (define_insn_and_split "float_<mode>si2_ > { > if (GET_CODE (operands[2]) == SCRATCH) > operands[2] = gen_reg_rtx (DImode); > + > + if (MEM_P (operands[1]) && !reload_completed) > + operands[1] = rs6000_address_for_fpconvert (operands[1]); > }) It will need a comment here, then (other callers of rs6000_address_for_fpconvert do not test for !reload_completed). Or maybe the predicate should be stricter in all these cases? nonimmediate_operand allows a lot ;-) > --- gcc/testsuite/gcc.target/powerpc/pr81959.c (revision 0) > +++ gcc/testsuite/gcc.target/powerpc/pr81959.c (revision 0) > @@ -0,0 +1,25 @@ > +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ > +/* { dg-require-effective-target powerpc_p9vector_ok } */ > +/* { dg-options "-mpower9-vector -O2 -mfloat128" } */ powerpc*-*-*, or does that not work? Segher