On Thu, Jul 20, 2017 at 01:49:03PM +0100, Wilco Dijkstra wrote:
> In https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01125.html Jiong
> pointed out some addressing inefficiencies due to a recent change in
> regcprop (https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00775.html).
> 
> This patch improves aarch64_legitimize_address_displacement to split
> unaligned offsets of TImode and TFmode accesses.  The resulting code
> is better and no longer relies on the original regcprop optimization.
> 
> For the test we now produce:
> 
>       add     x1, sp, 4
>       stp     xzr, xzr, [x1, 24]
> 
> rather than:
> 
>         mov     x1, sp
>         add     x1, x1, 28
>         stp     xzr, xzr, [x1]
> 
> OK for commit?

OK.

Reviewed by: James Greenhalgh <james.greenha...@arm.com>

Thanks,
James

> 
> ChangeLog:
> 2017-06-20  Wilco Dijkstra  <wdijk...@arm.com>
> 
>       * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
>       Improve unaligned TImode/TFmode base/offset split.
> 
> testsuite
>       * gcc.target/aarch64/ldp_stp_unaligned_2.c: New file.
> 
> --

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