On Fri, Nov 03, 2017 at 05:52:05PM +0000, Richard Sandiford wrote: > This patch adds support for unwinding frames that use the SVE > pseudo VG register. We want this register to act like a normal > register if the CFI explicitly sets it, but want to provide a > default value otherwise. Computing the default value requires > an SVE target, so we only want to compute it on demand. > > aarch64_vg uses a hard-coded .inst in order to avoid a build > dependency on binutils 2.28 or later.
I think the new hook needs documenting in tm.texi , particularly as it implies a conditional write to VALUE. I think this is practice we've seen before, for example DWARF_REG_TO_UNWIND_COLUMN and REG_VALUE_IN_UNWIND_CONTEXT are defined in libgcc/config and documented in tm.texi. Otherwise, the AArch64 parts of this are OK. You mind need to wait for someone to OK the unwind-dw2.c part. Thanks, James Reviewed-by: James Greenhalgh <james.greenha...@arm.com> > 2017-11-03 Richard Sandiford <richard.sandif...@linaro.org> > > libgcc/ > * config/aarch64/value-unwind.h (aarch64_vg): New function. > (DWARF_LAZY_REGISTER_VALUE): Define. > * unwind-dw2.c (_Unwind_GetGR): Use DWARF_LAZY_REGISTER_VALUE > to provide a fallback register value. > > gcc/testsuite/ > * g++.target/aarch64/aarch64.exp: New harness. > * g++.target/aarch64/sve_catch_1.C: New test. > * g++.target/aarch64/sve_catch_2.C: Likewise. > * g++.target/aarch64/sve_catch_3.C: Likewise. > * g++.target/aarch64/sve_catch_4.C: Likewise. > * g++.target/aarch64/sve_catch_5.C: Likewise. > * g++.target/aarch64/sve_catch_6.C: Likewise. >
