On 22/11/17 14:53, Ramana Radhakrishnan wrote:
> Hi,
>
> I received a private report from a customer that gcc was putting out
> calls to __divdf3 when compiling with +nosimd. When the reciprocal math
> support was added this was probably an oversight or a typo.
>
> The canonical examples is :
>
> double
> foo (double x, double y)
> {
> return x / y;
> }
>
> with -march=armv8-a+nosimd
>
> generates a function that calls __divdf3. Ofcourse on AArch64 we don't
> have any software floating point and this causes issues.
>
> There is also a problem in +nosimd that has existed since the dawn of
> time in the port with respect to long doubles (128 bit floating point),
> here the ABI and the compiler expect the presence of the SIMD unit as
> these parameters are passed in the vector registers. Thus while +nosimd
> tries to prevent the use of SIMD instructions in the compile we don't
> get this right as we end up using ldr qN / str qN instructions and even
> there I think things go wrong in a simple example that I tried.
>
> Is that sufficient to consider marking +nosimd as deprecated in GCC-8
> and remove this in a future release ?
Yes, I certainly think we should consider that. Having options that are
known not to work (especially when they are known to be unfixable, as
this case is due to the ABI requirements) is not helpful to users.
>
> That is not a subject for this patch but something separate but I would
> like to put this into trunk and the release branches. Bootstrapped and
> regression tested on my aarch64 desktop.
>
> Ok ?
OK. It's perhaps useful internally to have a distinction between FP and
SIMD operations.
R.
>
> regards
> Ramana
>
>
> * config/aarch64/aarch64.md (div<mode>3): Change check to TARGET_FLOAT.
> * config/aarch64/aarch64.c (aarch64_emit_approx_div): Add early exit
> for vector mode and !TARGET_SIMD.
>
> p1.txt
>
>
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index 0c67e2b5c67..811f19c3f11 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -8442,6 +8442,9 @@ aarch64_emit_approx_div (rtx quo, rtx num, rtx den)
> || !use_approx_division_p)
> return false;
>
> + if (!TARGET_SIMD && VECTOR_MODE_P (mode))
> + return false;
> +
> /* Estimate the approximate reciprocal. */
> rtx xrcp = gen_reg_rtx (mode);
> emit_insn ((*get_recpe_type (mode)) (xrcp, den));
> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index 423a3352aab..83e49425090 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -5093,7 +5093,7 @@
> [(set (match_operand:GPF_F16 0 "register_operand")
> (div:GPF_F16 (match_operand:GPF_F16 1 "general_operand")
> (match_operand:GPF_F16 2 "register_operand")))]
> - "TARGET_SIMD"
> + "TARGET_FLOAT"
> {
> if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
> DONE;
>
