Hello Jakub!
On 28 Dec 11:07, Jakub Jelinek wrote:
> Hi!
>
> Martin reported sse-13.c ICEs without all the options it has in dg-options.
> The problem is that the GFNI builtins used incorrect ISA masks and the
> headers too. GFNI has one SSE encoded instruction (but that really needs
> SSE2 rather than SSE, because it uses V16QImode which is not enabled just
> for SSE), 2 AVX VEC encoded ones (without masking) and then EVEX encoded
> ones with masking where for *_mask we sometimes also need AVX512BW in
> addition to GFNI + {AVX512VL,AVX512F} in the CPUID column in the pdf.
>
> Of course, such combinations don't really work properly with the current
> handling of the builtin masks, so I've finally analyzed all cases where we
> combine multiple ISA options in masks and found out that these days
> what actually is an exception is where we require one isa or another isa,
> rather than both or all 3. So instead of adding further and further
> exceptions, this patch changes the general rule, by default we require
> all the listed ISAs to be enabled and have 3 exceptions to that rule
> (SSE | 3DNOW_A), (FMA | FMA4) and (SSE4_2 | CRC32), where we are looking for
> at least one of those enabled rather than both (but, if these are ored with
> other ISA masks, we require one of the two from the pair and all others).
>
> Another thing is that 3 intrinsic headers were missing the boilerplate,
> some were using incorrect macros etc.
>
> The new testcase unfortunately still has to require -msse2 -mmmx, because
> some intrin headers aren't fully correct in their pragmas (don't enable
> MMX where required etc.).
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
OK.
--
Thanks, K
