GCC maintainers: The following patch is a partial backport of mainline commit 257748 to remove the vec_vextract4b and vec_vinsert4b support. Note in GCC 7, vec_vextract4b is still used so only the external definitions, documentation and testcases are removed for vec_vextract4b. All of the vec_vinsert4b support is removed.
This patch has been tested on GCC 7: powerpc64le-unknown-linux-gnu (Power 8 LE) powerpc64-unknown-linux-gnu (Power 8 BE) with no regressions. Let me know if the patch looks OK or not. Thanks. Carl Love --------------------------------------------------------------------- gcc/ChangeLog 2018-02-28 Carl Love <c...@us.ibm.com> * config/rs6000/altivec.h: Remove vec_vextract4b and vec_vinsert4b. * config/rs6000/rs6000-builtin.def: Remove macro expansion for VINSERT4B_DI and VINSERT4B. * config/rs6000/rs6000.c: Remove case statements for P9V_BUILTIN_VINSERT4B, P9V_BUILTIN_VINSERT4B_DI, and P9V_BUILTIN_VEC_VINSERT4B. * config/rs6000/rs6000-c.c (altivec_expand_builtin): Remove entries for P9V_BUILTIN_VEC_VEXTRACT4B and P9V_BUILTIN_VEC_VINSERT4B. * config/rs6000/vsx.md: Remove define_expand vinsert4b, define_insn *vinsert4b_internal, define_insn "*vinsert4b_di_internal. * doc/extend.texi: Remove vec_vextract4b, non ABI definitions for vec_insert4b. gcc/testsuite/ChangeLog 2018-02-28 Carl Love <c...@us.ibm.com> * gcc.target/powerpc/p9-vinsert4b-1.c: Remove test file for non-ABI tests. * gcc.target/powerpc/p9-vinsert4b-2.c: Remove test file for non-ABI tests. --- gcc/config/rs6000/altivec.h | 2 - gcc/config/rs6000/rs6000-builtin.def | 3 -- gcc/config/rs6000/rs6000-c.c | 21 --------- gcc/config/rs6000/rs6000.c | 5 +-- gcc/config/rs6000/vsx.md | 52 +---------------------- gcc/doc/extend.texi | 12 +----- gcc/testsuite/gcc.target/powerpc/p9-vinsert4b-1.c | 39 ----------------- gcc/testsuite/gcc.target/powerpc/p9-vinsert4b-2.c | 30 ------------- 8 files changed, 3 insertions(+), 161 deletions(-) delete mode 100644 gcc/testsuite/gcc.target/powerpc/p9-vinsert4b-1.c delete mode 100644 gcc/testsuite/gcc.target/powerpc/p9-vinsert4b-2.c diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h index 3011a87..e04c3a5 100644 --- a/gcc/config/rs6000/altivec.h +++ b/gcc/config/rs6000/altivec.h @@ -398,8 +398,6 @@ #define vec_vctzd __builtin_vec_vctzd #define vec_vctzh __builtin_vec_vctzh #define vec_vctzw __builtin_vec_vctzw -#define vec_vextract4b __builtin_vec_vextract4b -#define vec_vinsert4b __builtin_vec_vinsert4b #define vec_extract4b __builtin_vec_extract4b #define vec_insert4b __builtin_vec_insert4b #define vec_vprtyb __builtin_vec_vprtyb diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 46ae21a..00e8e60 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -2034,8 +2034,6 @@ BU_P9V_AV_2 (VEXTUWRX, "vextuwrx", CONST, vextuwrx) /* Insert/extract 4 byte word into a vector. */ BU_P9V_VSX_2 (VEXTRACT4B, "vextract4b", CONST, vextract4b) -BU_P9V_VSX_3 (VINSERT4B, "vinsert4b", CONST, vinsert4b) -BU_P9V_VSX_3 (VINSERT4B_DI, "vinsert4b_di", CONST, vinsert4b_di) BU_P9V_VSX_3 (INSERT4B, "insert4b", CONST, insert4b) BU_P9V_VSX_2 (EXTRACT4B, "extract4b", CONST, extract4b) @@ -2090,7 +2088,6 @@ BU_P9V_OVERLOAD_2 (EXTRACT4B, "extract4b") /* ISA 3.0 Vector scalar overloaded 3 argument functions */ BU_P9V_OVERLOAD_3 (STXVL, "stxvl") -BU_P9V_OVERLOAD_3 (VINSERT4B, "vinsert4b") BU_P9V_OVERLOAD_3 (INSERT4B, "insert4b") /* Overloaded CMPNE support was implemented prior to Power 9, diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index c3134fc..c6fd524 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -5109,27 +5109,6 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = { { P9V_BUILTIN_VEC_INSERT4B, P9V_BUILTIN_INSERT4B, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTSI }, - { P9V_BUILTIN_VEC_VINSERT4B, P9V_BUILTIN_VINSERT4B, - RS6000_BTI_V16QI, RS6000_BTI_V4SI, - RS6000_BTI_V16QI, RS6000_BTI_UINTSI }, - { P9V_BUILTIN_VEC_VINSERT4B, P9V_BUILTIN_VINSERT4B, - RS6000_BTI_V16QI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_V16QI, RS6000_BTI_UINTSI }, - { P9V_BUILTIN_VEC_VINSERT4B, P9V_BUILTIN_VINSERT4B, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V4SI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTSI }, - { P9V_BUILTIN_VEC_VINSERT4B, P9V_BUILTIN_VINSERT4B_DI, - RS6000_BTI_V16QI, RS6000_BTI_INTDI, - RS6000_BTI_V16QI, RS6000_BTI_UINTDI }, - { P9V_BUILTIN_VEC_VINSERT4B, P9V_BUILTIN_VINSERT4B_DI, - RS6000_BTI_V16QI, RS6000_BTI_UINTDI, - RS6000_BTI_V16QI, RS6000_BTI_UINTDI }, - { P9V_BUILTIN_VEC_VINSERT4B, P9V_BUILTIN_VINSERT4B_DI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_INTDI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTDI }, - { P9V_BUILTIN_VEC_VINSERT4B, P9V_BUILTIN_VINSERT4B_DI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTDI, - RS6000_BTI_unsigned_V16QI, RS6000_BTI_UINTDI }, { P8V_BUILTIN_VEC_VADDECUQ, P8V_BUILTIN_VADDECUQ, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI, RS6000_BTI_V1TI }, diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 21ce297..0d7fc51 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -16400,9 +16400,6 @@ altivec_expand_builtin (tree exp, rtx target, bool *expandedp) } break; - case P9V_BUILTIN_VINSERT4B: - case P9V_BUILTIN_VINSERT4B_DI: - case P9V_BUILTIN_VEC_VINSERT4B: case P9V_BUILTIN_VEC_INSERT4B: arg2 = CALL_EXPR_ARG (exp, 2); STRIP_NOPS (arg2); @@ -16413,7 +16410,7 @@ altivec_expand_builtin (tree exp, rtx target, bool *expandedp) if (TREE_CODE (arg2) != INTEGER_CST || TREE_INT_CST_LOW (arg2) > 12) { - error ("third argument to vec_vinsert4b must be 0..12"); + error ("third argument to vec_insert4b must be 0..12"); return expand_call (exp, target, false); } break; diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index c00238b..e63ed24 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -4084,7 +4084,7 @@ ;; Vector insert/extract word at arbitrary byte values. Note, the little ;; endian version needs to adjust the byte number, and the V4SI element in -;; vinsert4b. +;; insert4b. (define_insn "extract4b" [(set (match_operand:V2DI 0 "vsx_register_operand") (unspec:V2DI [(match_operand:V16QI 1 "vsx_register_operand" "wa") @@ -4164,56 +4164,6 @@ } [(set_attr "type" "vecperm")]) -(define_expand "vinsert4b" - [(set (match_operand:V16QI 0 "vsx_register_operand") - (unspec:V16QI [(match_operand:V4SI 1 "vsx_register_operand") - (match_operand:V16QI 2 "vsx_register_operand") - (match_operand:QI 3 "const_0_to_12_operand")] - UNSPEC_XXINSERTW))] - "TARGET_P9_VECTOR" -{ - if (!VECTOR_ELT_ORDER_BIG) - { - rtx op1 = operands[1]; - rtx v4si_tmp = gen_reg_rtx (V4SImode); - emit_insn (gen_vsx_xxpermdi_v4si_be (v4si_tmp, op1, op1, const1_rtx)); - operands[1] = v4si_tmp; - operands[3] = GEN_INT (12 - INTVAL (operands[3])); - } -}) - -(define_insn "*vinsert4b_internal" - [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa") - (unspec:V16QI [(match_operand:V4SI 1 "vsx_register_operand" "wa") - (match_operand:V16QI 2 "vsx_register_operand" "0") - (match_operand:QI 3 "const_0_to_12_operand" "n")] - UNSPEC_XXINSERTW))] - "TARGET_P9_VECTOR" - "xxinsertw %x0,%x1,%3" - [(set_attr "type" "vecperm")]) - -(define_expand "vinsert4b_di" - [(set (match_operand:V16QI 0 "vsx_register_operand") - (unspec:V16QI [(match_operand:DI 1 "vsx_register_operand") - (match_operand:V16QI 2 "vsx_register_operand") - (match_operand:QI 3 "const_0_to_12_operand")] - UNSPEC_XXINSERTW))] - "TARGET_P9_VECTOR" -{ - if (!VECTOR_ELT_ORDER_BIG) - operands[3] = GEN_INT (12 - INTVAL (operands[3])); -}) - -(define_insn "*vinsert4b_di_internal" - [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa") - (unspec:V16QI [(match_operand:DI 1 "vsx_register_operand" "wj") - (match_operand:V16QI 2 "vsx_register_operand" "0") - (match_operand:QI 3 "const_0_to_12_operand" "n")] - UNSPEC_XXINSERTW))] - "TARGET_P9_VECTOR" - "xxinsertw %x0,%x1,%3" - [(set_attr "type" "vecperm")]) - ;; Support for ISA 3.0 vector byte reverse diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index d1fa318..977664f 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -18124,21 +18124,11 @@ vector unsigned short vec_vctzh (vector unsigned short); vector int vec_vctzw (vector int); vector unsigned int vec_vctzw (vector int); -long long vec_vextract4b (const vector signed char, const int); -vector unsigned long long vec_extract4b (vector unsigned char, - const int); -long long vec_extract4b (const vector signed char, const int); -long long vec_vextract4b (const vector unsigned char, const int); - +long long vec_extract4b (const vector unsigned char, const int); vector unsigned char vec_insert4b (vector signed int, vector unsigned char, const int); vector unsigned char vec_insert4b (vector unsigned int, vector unsigned char, const int); -vector signed char vec_insert4b (vector int, vector signed char, const int); -vector unsigned char vec_insert4b (vector unsigned int, vector unsigned char, - const int); -vector signed char vec_insert4b (long long, vector signed char, const int); -vector unsigned char vec_insert4b (long long, vector unsigned char, const int); vector int vec_vprtyb (vector int); vector unsigned int vec_vprtyb (vector unsigned int); diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vinsert4b-1.c b/gcc/testsuite/gcc.target/powerpc/p9-vinsert4b-1.c deleted file mode 100644 index fa1ba75..0000000 --- a/gcc/testsuite/gcc.target/powerpc/p9-vinsert4b-1.c +++ /dev/null @@ -1,39 +0,0 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ -/* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-options "-mcpu=power9 -O2" } */ - -#include <altivec.h> - -vector signed char -vins_v4si (vector int *vi, vector signed char *vc) -{ - return vec_vinsert4b (*vi, *vc, 1); -} - -vector unsigned char -vins_di (long di, vector unsigned char *vc) -{ - return vec_vinsert4b (di, *vc, 2); -} - -vector char -vins_di2 (long *p_di, vector char *vc) -{ - return vec_vinsert4b (*p_di, *vc, 3); -} - -vector unsigned char -vins_di0 (vector unsigned char *vc) -{ - return vec_vinsert4b (0, *vc, 4); -} - -long -vext (vector signed char *vc) -{ - return vec_vextract4b (*vc, 5); -} - -/* { dg-final { scan-assembler "xxextractuw\|vextuw\[lr\]x" } } */ -/* { dg-final { scan-assembler "xxinsertw" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vinsert4b-2.c b/gcc/testsuite/gcc.target/powerpc/p9-vinsert4b-2.c deleted file mode 100644 index 3b5872e..0000000 --- a/gcc/testsuite/gcc.target/powerpc/p9-vinsert4b-2.c +++ /dev/null @@ -1,30 +0,0 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ -/* { dg-require-effective-target powerpc_p9vector_ok } */ -/* { dg-options "-mcpu=power9 -O2" } */ - -#include <altivec.h> - -vector signed char -ins_v4si (vector int vi, vector signed char vc) -{ - return vec_vinsert4b (vi, vc, 13); /* { dg-error "vec_vinsert4b" } */ -} - -vector unsigned char -ins_di (long di, vector unsigned char vc, long n) -{ - return vec_vinsert4b (di, vc, n); /* { dg-error "vec_vinsert4b" } */ -} - -long -vext1 (vector signed char vc) -{ - return vec_vextract4b (vc, 13); /* { dg-error "vec_vextract4b" } */ -} - -long -vextn (vector unsigned char vc, long n) -{ - return vec_vextract4b (vc, n); /* { dg-error "vec_vextract4b" } */ -} -- 2.7.4