On Wed, May 23, 2018 at 11:39 AM, Peryt, Sebastian
<sebastian.pe...@intel.com> wrote:
>> From: Uros Bizjak [mailto:ubiz...@gmail.com]
>> Sent: Tuesday, May 22, 2018 8:43 PM
>> To: gcc-patches@gcc.gnu.org
>> Cc: Peryt, Sebastian <sebastian.pe...@intel.com>; Jakub Jelinek
>> <ja...@redhat.com>
>> Subject: [RFT PATCH, AVX512]: Implement scalar unsigned int->float 
>> conversions
>> with AVX512F
>>
>> Hello!
>>
>> Attached patch implements scalar unsigned int->float conversions with
>> AVX512F.
>>
>> 2018-05-22  Uros Bizjak  <ubiz...@gmail.com>
>>
>>     * config/i386/i386.md (*floatuns<SWI48:mode><MODEF:mode>2_avx512):
>>     New insn pattern.
>>     (floatunssi<mode>2): Also enable for AVX512F and TARGET_SSE_MATH.
>>     Rewrite expander pattern.  Emit gen_floatunssi<mode>2_i387_with_xmm
>>     for non-SSE modes.
>>     (floatunsdisf2): Rewrite expander pattern.  Hanlde TARGET_AVX512F.
>>     (floatunsdidf2): Ditto.
>>
>> testsuite/ChangeLog:
>>
>> 2018-05-22  Uros Bizjak  <ubiz...@gmail.com>
>>
>>     * gcc.target/i386/cvt-3.c: New test.
>>
>> Patch was bootstrapped and regression tested on x86_64-linux-gnu {,-m32}., 
>> but
>> not tested on AVX512 target.
>
> I have checked it on x86_64-linux-gnu {,-m32} on SKX and don't see any 
> stability regressions.

Thanks!

Committed to mainline SVN.

Uros.

Reply via email to