Hi Christophe,
On 31/05/18 09:38, Christophe Lyon wrote:
Hi,
On 29 May 2018 at 18:02, James Greenhalgh <[email protected]> wrote:
> On Tue, May 29, 2018 at 10:28:27AM -0500, Kyrill Tkachov wrote:
>> [sending on behalf of Jackson Woodruff]
>>
>> Hi all,
>>
>> This patch generalizes the formation of LDP/STP that require a base register.
>>
>> In AArch64, LDP/STP instructions have different sized immediate offsets than
>> normal LDR/STR instructions. This part of the backend attempts to spot groups
>> of four LDR/STR instructions that can be turned into LDP/STP instructions by
>> using a base register.
>>
>> Previously, we would only accept address pairs that were ordered in ascending
>> or descending order, and only strictly sequential loads/stores. In fact, the
>> instructions that we generate from this should be able to consider any order
>> of loads or stores (provided that they can be re-ordered). They should also
be
>> able to accept non-sequential loads and stores provided that the two pairs of
>> addresses are amenable to pairing. The current code is also overly
restrictive
>> on the range of addresses that are accepted, as LDP/STP instructions may take
>> negative offsets as well as positive ones.
>>
>> This patch improves that by allowing us to accept all orders of loads/stores
>> that are valid, and extending the range that the LDP/STP addresses can reach.
>
> OK.
>
The new test ldp_stp_10.c fails in ILP32 mode:
FAIL: gcc.target/aarch64/ldp_stp_10.c scan-assembler-times
ldp\tw[0-9]+, w[0-9]+, 2
FAIL: gcc.target/aarch64/ldp_stp_10.c scan-assembler-times
ldp\tx[0-9]+, x[0-9]+, 2
This is because the register allocation is such that the last load in the
sequence clobbers the address register like so:
...
ldr w0, [x2, 1600]
ldr w1, [x2, 2108]
ldr w3, [x2, 1604]
ldr w2, [x2, 2112] //<<--- x2 is an address and a destination
...
The checks in aarch64_operands_adjust_ok_for_ldpstp bail out for this case.
I believe as long as w2 is loaded in the second/last LDP pair that this
optimisation generates
and the address is not a writeback address (as we are guaranteed in this
context) then it should
be safe to form the LDP pairs.
So this is a missed-optimization to me.
Can you please file a bug report?
Thanks,
Kyrill
Christophe
> Thanks,
> James
>
>
