So this patch converts the v850 port to use LRA. From a code generation
standpoint it looks like the old bare v850 gets slightly worse code.
However, we get slightly better code in general on the newer parts like
v850e3v5.
The only really interesting part of the conversion is the removal of
several patterns that never should have existed in the first place. A
later variant of the v850 introduced loads/stores with larger
displacement values then the original v850 supported.
Those loads/stores were implemented with distinct patterns that only
matched those large displacement loads/stores.
The better solution is to fix GO_IF_LEGITIMATE_ADDRESS to allow the
larger displacements. Once that's done the existing movxx patterns as
well as the zero/sign extending loads can use the bigger displacements
as-is.
That also avoids a bit of a wart in the LRA implementation related to
re-recognizing insns during register elimination. I'm actually rather
surprised reload didn't complain as well as we've long required a single
movXX pattern to implement all the loads/stores for a particular mode
for similar reasons.
>From a testing standpoint we get 100% identical results with LRA as we
were getting without LRA.
Installed on the trunk.
Jeff
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a0da66e6932..c486d6d2172 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2018-06-29 Jeff Law <l...@redhat.com>
+
+ * config/v850/v850.c (v850_legitimate_address_p): Handle large
+ displacements for TARGET_V850E2V3 and newer.
+ (TARGET_LRA_P): Remove. Defaults to LRA now.
+ * config/v850/v850.md (sign23byte_load): Remove.
+ (unsign23byte_load, sign23hword_load, unsign23hword_load): Likewise.
+ (23word_load, 23byte_store, 23hword_store, 23word_store): Likewise.
+
2018-06-29 Martin Liska <mli...@suse.cz>
PR lto/85759
diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c
index cb2debf46f1..8936c732307 100644
--- a/gcc/config/v850/v850.c
+++ b/gcc/config/v850/v850.c
@@ -3079,7 +3079,10 @@ v850_legitimate_address_p (machine_mode mode, rtx x,
bool strict_p,
return true;
if (GET_CODE (x) == PLUS
&& v850_rtx_ok_for_base_p (XEXP (x, 0), strict_p)
- && constraint_satisfied_p (XEXP (x,1), CONSTRAINT_K)
+ && (constraint_satisfied_p (XEXP (x, 1), CONSTRAINT_K)
+ || (TARGET_V850E2V3_UP
+ && (mode == SImode || mode == HImode || mode == QImode)
+ && constraint_satisfied_p (XEXP (x, 1), CONSTRAINT_W)))
&& ((mode == QImode || INTVAL (XEXP (x, 1)) % 2 == 0)
&& CONST_OK_FOR_K (INTVAL (XEXP (x, 1))
+ (GET_MODE_NUNITS (mode) * UNITS_PER_WORD))))
@@ -3309,9 +3312,6 @@ v850_modes_tieable_p (machine_mode mode1, machine_mode
mode2)
#undef TARGET_LEGITIMATE_CONSTANT_P
#define TARGET_LEGITIMATE_CONSTANT_P v850_legitimate_constant_p
-#undef TARGET_LRA_P
-#define TARGET_LRA_P hook_bool_void_false
-
#undef TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P
#define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P v850_legitimate_address_p
diff --git a/gcc/config/v850/v850.md b/gcc/config/v850/v850.md
index b8f098b9363..6530778c8f6 100644
--- a/gcc/config/v850/v850.md
+++ b/gcc/config/v850/v850.md
@@ -138,74 +138,6 @@
;; ----------------------------------------------------------------------
;; MOVE INSTRUCTIONS
;; ----------------------------------------------------------------------
-(define_insn "sign23byte_load"
- [(set (match_operand:SI 0 "register_operand" "=r")
- (sign_extend:SI
- (mem:QI (plus:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand 2 "disp23_operand" "W")))))]
- "TARGET_V850E2V3_UP"
- "ld.b %2[%1],%0"
- [(set_attr "length" "4")])
-
-(define_insn "unsign23byte_load"
- [(set (match_operand:SI 0 "register_operand" "=r")
- (zero_extend:SI
- (mem:QI (plus:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand 2 "disp23_operand" "W")))))]
- "TARGET_V850E2V3_UP"
- "ld.bu %2[%1],%0"
- [(set_attr "length" "4")])
-
-(define_insn "sign23hword_load"
- [(set (match_operand:SI 0 "register_operand" "=r")
- (sign_extend:SI
- (mem:HI (plus:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand 2 "disp23_operand" "W")))))]
- "TARGET_V850E2V3_UP"
- "ld.h %2[%1],%0"
- [(set_attr "length" "4")])
-
-(define_insn "unsign23hword_load"
- [(set (match_operand:SI 0 "register_operand" "=r")
- (zero_extend:SI
- (mem:HI (plus:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand 2 "disp23_operand" "W")))))]
- "TARGET_V850E2V3_UP"
- "ld.hu %2[%1],%0"
- [(set_attr "length" "4")])
-
-(define_insn "23word_load"
- [(set (match_operand:SI 0 "register_operand" "=r")
- (mem:SI (plus:SI (match_operand:SI 1 "register_operand" "r")
- (match_operand 2 "disp23_operand" "W"))))]
- "TARGET_V850E2V3_UP"
- "ld.w %2[%1],%0"
- [(set_attr "length" "4")])
-
-(define_insn "23byte_store"
- [(set (mem:QI (plus:SI (match_operand:SI 0 "register_operand" "r")
- (match_operand 1 "disp23_operand" "W")))
- (match_operand:QI 2 "register_operand" "r"))]
- "TARGET_V850E2V3_UP"
- "st.b %2,%1[%0]"
- [(set_attr "length" "4")])
-
-(define_insn "23hword_store"
- [(set (mem:HI (plus:SI (match_operand:SI 0 "register_operand" "r")
- (match_operand 1 "disp23_operand" "W")))
- (match_operand:HI 2 "register_operand" "r"))]
- "TARGET_V850E2V3_UP"
- "st.h %2,%1[%0]"
- [(set_attr "length" "4")])
-
-(define_insn "23word_store"
- [(set (mem:SI (plus:SI (match_operand:SI 0 "register_operand" "r")
- (match_operand 1 "disp23_operand" "W")))
- (match_operand:SI 2 "register_operand" "r"))]
- "TARGET_V850E2V3_UP"
- "st.w %2,%1[%0]"
- [(set_attr "length" "4")])
-
;; movdi
(define_expand "movdi"
