On Fri, Jul 27, 2018 at 11:37 AM, Richard Earnshaw <richard.earns...@arm.com> wrote: > > This patch adds a speculation barrier for x86, based on my > understanding of the required mitigation for that CPU, which is to use > an lfence instruction. > > This patch needs some review by an x86 expert and if adjustments are > needed, I'd appreciate it if they could be picked up by the port > maintainer. This is supposed to serve as an example of how to deploy > the new __builtin_speculation_safe_value() intrinsic on this > architecture. > > * config/i386/i386.md (unspecv): Add UNSPECV_SPECULATION_BARRIER. > (speculation_barrier): New insn.
The implementation is OK, but someone from Intel (CC'd) should clarify if lfence is the correct insn. Uros.
