[PATCH 7/9][GCC][Arm] Enable autovectorization of Half float values

[Tamar Christina]

Hi All,

The AArch32 backend is currently not able to support autovectorization of 
half-float values
on ARM. This is because we never told the vectorizer what the vector modes are 
for Half floats.

This enables autovectorization by definiting V4HF and V8HF as the vector modes.

Bootstrap and Regtest on aarch64-none-linux-gnu, arm-none-gnueabihf and 
x86_64-pc-linux-gnu
are still on going but previous patch showed no regressions.

Ok for trunk?

Thanks,
Tamar

gcc/ChangeLog:

2018-11-11  Tamar Christina  <tamar.christ...@arm.com>

        * config/arm/arm.c (arm_preferred_simd_mode): Add V4HF and V8HF.

-- 

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 8393f0b87f34c04c9dcc89c63d2e9bbd042c969c..79502606b632e6a187732c8b3be118df8bde149a 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -27211,6 +27211,8 @@ arm_preferred_simd_mode (scalar_mode mode)
   if (TARGET_NEON)
     switch (mode)
       {
+      case E_HFmode:
+	return TARGET_NEON_VECTORIZE_DOUBLE ? V4HFmode : V8HFmode;
       case E_SFmode:
 	return TARGET_NEON_VECTORIZE_DOUBLE ? V2SFmode : V4SFmode;
       case E_SImode: