On 29/11/2018 10:51, Thomas Preudhomme wrote:
> Hi,
>
> FP instructions are only enabled for TARGET_32BIT and TARGET_HARD_FLOAT
> but GCC only gives an error when TARGET_HARD_FLOAT is true and -mfpu is
> not set. Among other things, it makes some of the cmse tests (eg.
> gcc.target/arm/cmse/baseline/softfp.c) fail when targeting
> -march=armv8-m.base -mfpu=<something> -mfloat-abi=softfp. This patch
> errors out when a Thumb-1 -like target is selected and a FPU is
> specified, thus making such tests being skipped.
>
> ChangeLog entries are as follows:
>
> *** gcc/ChangeLog ***
>
> 2018-11-28 thomas Preud'homme <thomas.preudho...@linaro.org>
>
> * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Error out
> if targeting Thumb-1 with an FPU specified.
>
> *** gcc/testsuite/ChangeLog ***
>
> 2018-11-28 thomas Preud'homme <thomas.preudho...@linaro.org>
>
> * gcc.target/arm/thumb1_mfpu-1.c: New testcase.
> * gcc.target/arm/thumb1_mfpu-2.c: Likewise.
>
> Testing: No testsuite regression when targeting arm-none-eabi Armv6S-M.
> Fails as expected when targeting Armv6-M with an -mfpu or a default FPU.
> Succeeds without.
>
> Is this ok for stage3?
>
This doesn't sound right. Specifically this bit...
+ else if (TARGET_THUMB1
+ && bitmap_bit_p (arm_active_target.isa, isa_bit_vfpv2))
+ error ("Thumb-1 does not allow FP instructions");
If I use
-mcpu=arm1176jzf-s -mfpu=auto -mfloat-abi=softfp -mthumb
then that shouldn't error, since softfp and thumb is, in reality, just
float-abi=soft (as there are no fp instructions in thumb). We also want
it to work this way so that I can add the thumb/arm attribute to
specific functions and have the compiler use HW float instructions when
they are suitable.
R.
> Best regards,
>
> Thomas
>
>
> thumb1_mfpu_error.patch
>
> From 051e38552d7c596873e0303f6ec4272b26d50900 Mon Sep 17 00:00:00 2001
> From: Thomas Preud'homme <thomas.preudho...@linaro.org>
> Date: Tue, 27 Nov 2018 15:52:38 +0000
> Subject: [PATCH] [PATCH, ARM] Error out when -mfpu set and targeting Thumb-1
>
> Hi,
>
> FP instructions are only enabled for TARGET_32BIT and TARGET_HARD_FLOAT
> but GCC only gives an error when TARGET_HARD_FLOAT is true and -mfpu is
> not set. Among other things, it makes some of the cmse tests (eg.
> gcc.target/arm/cmse/baseline/softfp.c) fail when targeting
> -march=armv8-m.base -mfpu=<something> -mfloat-abi=softfp. This patch
> errors out when a Thumb-1 -like target is selected and a FPU is
> specified, thus making such tests being skipped.
>
> ChangeLog entries are as follows:
>
> *** gcc/ChangeLog ***
>
> 2018-11-28 thomas Preud'homme <thomas.preudho...@linaro.org>
>
> * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Error out
> if targeting Thumb-1 with an FPU specified.
>
> *** gcc/testsuite/ChangeLog ***
>
> 2018-11-28 thomas Preud'homme <thomas.preudho...@linaro.org>
>
> * gcc.target/arm/thumb1_mfpu-1.c: New testcase.
> * gcc.target/arm/thumb1_mfpu-2.c: Likewise.
>
> Testing: No testsuite regression when targeting arm-none-eabi Armv6S-M.
> Fails as expected when targeting Armv6-M with an -mfpu or a default FPU.
> Succeeds without.
>
> Is this ok for stage3?
>
> Best regards,
>
> Thomas
> ---
> gcc/config/arm/arm.c | 3 +++
> gcc/testsuite/gcc.target/arm/thumb1_mfpu-1.c | 7 +++++++
> gcc/testsuite/gcc.target/arm/thumb1_mfpu-2.c | 8 ++++++++
> 3 files changed, 18 insertions(+)
> create mode 100644 gcc/testsuite/gcc.target/arm/thumb1_mfpu-1.c
> create mode 100644 gcc/testsuite/gcc.target/arm/thumb1_mfpu-2.c
>
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index 40f0574e32e..1a205123cf5 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -3747,6 +3747,9 @@ arm_options_perform_arch_sanity_checks (void)
> {
> if (arm_abi == ARM_ABI_IWMMXT)
> arm_pcs_default = ARM_PCS_AAPCS_IWMMXT;
> + else if (TARGET_THUMB1
> + && bitmap_bit_p (arm_active_target.isa, isa_bit_vfpv2))
> + error ("Thumb-1 does not allow FP instructions");
> else if (TARGET_HARD_FLOAT_ABI)
> {
> arm_pcs_default = ARM_PCS_AAPCS_VFP;
> diff --git a/gcc/testsuite/gcc.target/arm/thumb1_mfpu-1.c
> b/gcc/testsuite/gcc.target/arm/thumb1_mfpu-1.c
> new file mode 100644
> index 00000000000..5347e63f9b6
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arm/thumb1_mfpu-1.c
> @@ -0,0 +1,7 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target arm_thumb1_ok } */
> +/* { dg-skip-if "incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } {
> "-mfloat-abi=softfp" } } */
> +/* { dg-options "-mthumb -mfpu=vfp -mfloat-abi=softfp" } */
> +/* { dg-error "Thumb-1 does not allow FP instructions" "" { target *-*-* } 0
> } */
> +
> +int foo;
> diff --git a/gcc/testsuite/gcc.target/arm/thumb1_mfpu-2.c
> b/gcc/testsuite/gcc.target/arm/thumb1_mfpu-2.c
> new file mode 100644
> index 00000000000..941ed26ed01
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arm/thumb1_mfpu-2.c
> @@ -0,0 +1,8 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target arm_thumb1_ok } */
> +/* { dg-skip-if "incompatible float ABI" { *-*-* } { "-mfloat-abi=*" } {
> "-mfloat-abi=softfp" } } */
> +/* No need to skip in presence of -mfpu since arm_thumb1_ok will already fail
> + due to Thumb-1 with -mfpu which is tested by thumb1_mfpu-1 testcase. */
> +/* { dg-options "-mthumb -mfloat-abi=softfp" } */
> +
> +int foo;
>
