>From 283110f7979af5404dffa87265ab4c6ee33f8104 Mon Sep 17 00:00:00 2001
From: Olivier Hainque <hainque@adacore.com>
Date: Wed, 12 Dec 2018 07:15:13 -0800
Subject: [PATCH 4/4] Allow target (OS) configuration to state R18 as reserved
 on aarch64

	* config/aarch64/aarch64.h (FIXED_R18): New internal configuration
	macro, defaulted to 0.
	(FIXED_REGISTERS): Use it.
---
 gcc/config/aarch64/aarch64.h | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index a8063c2..89eb0c5 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -287,11 +287,17 @@ extern unsigned aarch64_architecture_version;
 
 /* Standard register usage.  */
 
+/* Whether R18, the "platform register", is used as such by the target
+   environment, and may thus not be used as a scratch register.  This may
+   be redefined to 1 by os specific configurations.  */
+#define FIXED_R18 0
+
 /* 31 64-bit general purpose registers R0-R30:
    R30		LR (link register)
    R29		FP (frame pointer)
    R19-R28	Callee-saved registers
-   R18		The platform register; use as temporary register.
+   R18		The platform register; available as temporary register
+                unless FIXED_R18 is set.
    R17		IP1 The second intra-procedure-call temporary register
 		(can be used by call veneers and PLT code); otherwise use
 		as a temporary register
@@ -327,7 +333,7 @@ extern unsigned aarch64_architecture_version;
   {							\
     0, 0, 0, 0,   0, 0, 0, 0,	/* R0 - R7 */		\
     0, 0, 0, 0,   0, 0, 0, 0,	/* R8 - R15 */		\
-    0, 0, 0, 0,   0, 0, 0, 0,	/* R16 - R23 */		\
+    0, 0, FIXED_R18, 0, 0, 0, 0, 0,	/* R16 - R23 */		\
     0, 0, 0, 0,   0, 1, 0, 1,	/* R24 - R30, SP */	\
     0, 0, 0, 0,   0, 0, 0, 0,   /* V0 - V7 */           \
     0, 0, 0, 0,   0, 0, 0, 0,   /* V8 - V15 */		\
-- 
1.9.1

