Hi Wilco,
Thanks for your feedback on this !
> On 12 Dec 2018, at 17:11, Wilco Dijkstra <wilco.dijks...@arm.com> wrote:
>
> Hi Oliver,
>
> +#define FIXED_R18 0
>
> { \
> 0, 0, 0, 0, 0, 0, 0, 0, /* R0 - R7 */ \
> 0, 0, 0, 0, 0, 0, 0, 0, /* R8 - R15 */ \
> - 0, 0, 0, 0, 0, 0, 0, 0, /* R16 - R23 */ \
> + 0, 0, FIXED_R18, 0, 0, 0, 0, 0, /* R16 - R23 */ \
>
> This is equivalent to having a zero in the table given the #define is
> unconditional.
Not quite, because the use is part of the FIXED_REGISTERS
macro definition, which is expanded in reginfo.c. We get the
value of FIXED_R18 at the expansion point, so after possible
redefinitions by os configuration files.
We're pretty sure this works as intended for the VxWorks port.
r18 is used as a task control block pointer by the OS runtime,
so any non trivial program rapidly misbehaves as soon as r18 is
used for anything else in the user code.
I'm happy to do it differently regardless :)
> It's best to use the existing mechanisms to change registers, this should be
> done
> in aarch64_conditional_register_usage given very similar changes for floating
> point and SVE are already there.
Ok. That would be achieved with -ffixed-r18 or so. I'll experiment
with a self spec, on top of the static chain update to r11 (change just
posted separately).
Thanks again for your feedback,
With Kind Regards,
Olivier
