This patch improves existing peephole optimizations. These peephole optimizations merge individual LDRs into LDM in the case that the order of registers in LDR instructions is not ascending, but the loaded values can be reordered because they are use of the loaded values is commutative.
There are two changes:
* use rtx__equal_p to compare operands (instead of plain ==)
* identify more cases of dead registers in the pattern.
For example, the following sequence
LDR r1, [r2]
LDR r0, [r2, #4]
ADD r0, r0, r1
can be transformed into
LDRD r0, r1, [r2]
ADD r0, r0, r1
when r1 is dead after ADD. Such optimization opportunities are missed by the
existing peephole conditions, because r0 is not dead after ADD. This patch
enables such transformations.
This patch is independent from other patches in this sequence, but it was
tested only as part of the sequence.
gcc/ChangeLog
2011-10-28 Greta Yorsh <greta.yo...@arm.com>
* config/arm/arm-ldmstm.ml: Improved conditions of peepholes that
generate
LDM followed by a commutative operator.
* config/arm/ldmstm.md: Regenerated.
4-ldm-commute.patch
Description: Binary data
