On Thu, Dec 20, 2018 at 1:09 PM Jakub Jelinek <ja...@redhat.com> wrote:
>
> On Thu, Dec 20, 2018 at 01:42:15PM +0530, Lokesh Janghel wrote:
> > Hi Mateuszb,
> >
> > I tested with your proposition patch and it is working right.
> > I also added the patch with test case.
> > Please let me know your thoughts/suggestions.
>
> ChangeLog entry is missing, please write it (and mention there
> Mateusz's name/mail as he wrote the i386.c part).
>
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index b3c8676..e54c489 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -9063,6 +9063,13 @@ function_value_ms_64 (machine_mode orig_mode,
> machine_mode mode,
> && !COMPLEX_MODE_P (mode))
> regno = FIRST_SSE_REG;
> break;
> + case 8:
> + case 4:
> + if (valtype != NULL_TREE && AGGREGATE_TYPE_P (valtype))
> + break;
> + if (mode == SFmode || mode == DFmode)
> + regno = FIRST_SSE_REG;
> + break;
> default:
> break;
> }
> diff --git a/gcc/testsuite/gcc.target/i386/pr88521.c
> b/gcc/testsuite/gcc.target/i386/pr88521.c
> new file mode 100644
> index 0000000..f42703a
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr88521.c
> @@ -0,0 +1,30 @@
> +/* { dg-do compile { target lp64 } } */
> +/* { dg-options "-O2" } */
> +/* { dg-final { scan-assembler-times "movl\[^\n\r]*, %eax|mov\[ \t]*eax," 1
> } } */
>
> You try here to handle both -masm=att and -masm=intel
>
> +/* { dg-final { scan-assembler-times "movss\[^\n\r]*, %xmm" 1 } } */
> +/* { dg-final { scan-assembler-times "movsd\[^\n\r]*, %xmm" 1 } } */
>
> but not here. For that it would need to be "movss\[^\n\r]*(?:, %xmm|xmm, )"
> and similarly for movsd (please verify with
> make check-gcc
> RUNTESTFLAGS='--target_board=unix\{-m32/-masm=att,-m32/-masm=intel,-m64/-masm=att,-m64/-masm=intel\}
> i386.exp=pr88521.c'
>
> I'll defer the final review to Uros.
This patch should be reviewed and evenutually approved by cygwin/mingw
maintainer.
Uros.
