On Mon, Feb 11, 2019 at 11:55 PM H.J. Lu <hjl.to...@gmail.com> wrote:
>
> Emulate MMX movntq with SSE2 movntidi. Only SSE register source operand
> is allowed.
Actually, it allows general register source operand.
>
> PR target/89021
> * config/i386/mmx.md (sse_movntq): Renamed to ...
> (*sse_movntq): This. Require TARGET_MMX and disallow
> TARGET_MMX_WITH_SSE.
> (sse_movntq): New. Emulate MMX movntq with SSE2 movntidi.
No need to complicate that much. Just add movnti alternative to the
existing pattern.
Uros.
> ---
> gcc/config/i386/mmx.md | 19 +++++++++++++++++--
> 1 file changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
> index b3048a6a3b8..2efa663b3e2 100644
> --- a/gcc/config/i386/mmx.md
> +++ b/gcc/config/i386/mmx.md
> @@ -238,11 +238,26 @@
> DONE;
> })
>
> -(define_insn "sse_movntq"
> +(define_expand "sse_movntq"
> + [(set (match_operand:DI 0 "memory_operand")
> + (unspec:DI [(match_operand:DI 1 "register_operand")]
> + UNSPEC_MOVNTQ))]
> + "(TARGET_MMX || TARGET_MMX_WITH_SSE)
> + && (TARGET_SSE || TARGET_3DNOW_A)"
> +{
> + if (TARGET_MMX_WITH_SSE)
> + {
> + rtx insn = gen_sse2_movntidi (operands[0], operands[1]);
> + emit_insn (insn);
> + DONE;
> + }
> +})
> +
> +(define_insn "*sse_movntq"
> [(set (match_operand:DI 0 "memory_operand" "=m")
> (unspec:DI [(match_operand:DI 1 "register_operand" "y")]
> UNSPEC_MOVNTQ))]
> - "TARGET_SSE || TARGET_3DNOW_A"
> + "TARGET_MMX && !TARGET_MMX_WITH_SSE && (TARGET_SSE || TARGET_3DNOW_A)"
> "movntq\t{%1, %0|%0, %1}"
> [(set_attr "type" "mmxmov")
> (set_attr "mode" "DI")])
> --
> 2.20.1
>
