Hi!
While working on the PR89784 patch, I've noticed various inconsistencies
in the fma patterns between constraints and predicates. Most of them time
it was correct though.
This is what I found:
1) if the constraint is like <round_constraint> or <round_constraint>,v
or v,<round_constraint>, then it will be just v or v,v with rounding,
while without rounding vm or vm,v or v,vm, so IMHO we don't want
unconditional nonimmediate_operand predicate, but <round_nimm_predicate>
which is vector_operand when not rounding and register_operand otherwise.
2) if the constraint is 0 or 0,0 (and the output is always =v or =v,v
in those cases), then using <round_nimm_predicate> makes no sense,
even without rounding we will not really allow memory in there, so this
patch uses register_operand in those cases.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2019-03-22 Jakub Jelinek <ja...@redhat.com>
* config/i386/sse.md (<avx512>_fmadd_<mode>_mask<round_name>,
<avx512>_fmadd_<mode>_mask3<round_name>,
<avx512>_fmsub_<mode>_mask<round_name>,
<avx512>_fmsub_<mode>_mask3<round_name>,
<avx512>_fnmadd_<mode>_mask<round_name>,
<avx512>_fnmadd_<mode>_mask3<round_name>,
<avx512>_fnmsub_<mode>_mask<round_name>,
<avx512>_fnmsub_<mode>_mask3<round_name>,
<avx512>_fmaddsub_<mode>_mask<round_name>,
<avx512>_fmaddsub_<mode>_mask3<round_name>,
<avx512>_fmsubadd_<mode>_mask<round_name>,
<avx512>_fmsubadd_<mode>_mask3<round_name>): Use
<round_nimm_predicate> instead of nonimmediate_operand.
(fmai_vmfmadd_<mode><round_name>, fmai_vmfmsub_<mode><round_name>,
fmai_vmfnmadd_<mode><round_name>, fmai_vmfnmsub_<mode><round_name>):
Use register_operand instead of <round_nimm_predicate> for the
operand that needs to match output.
(*fmai_fmadd_<mode>, *fmai_fmsub_<mode>,
*fmai_fnmadd_<mode><round_name>, *fmai_fnmsub_<mode><round_name>):
Likewise. Formatting fixes.
--- gcc/config/i386/sse.md.jj 2019-03-14 09:55:49.291867091 +0100
+++ gcc/config/i386/sse.md 2019-03-21 19:15:21.292495008 +0100
@@ -3958,8 +3958,8 @@ (define_insn "<avx512>_fmadd_<mode>_mask
(vec_merge:VF_AVX512VL
(fma:VF_AVX512VL
(match_operand:VF_AVX512VL 1 "register_operand" "0,0")
- (match_operand:VF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>,v")
- (match_operand:VF_AVX512VL 3 "nonimmediate_operand"
"v,<round_constraint>"))
+ (match_operand:VF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>,v")
+ (match_operand:VF_AVX512VL 3 "<round_nimm_predicate>"
"v,<round_constraint>"))
(match_dup 1)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
"TARGET_AVX512F && <round_mode512bit_condition>"
@@ -3974,7 +3974,7 @@ (define_insn "<avx512>_fmadd_<mode>_mask
(vec_merge:VF_AVX512VL
(fma:VF_AVX512VL
(match_operand:VF_AVX512VL 1 "register_operand" "v")
- (match_operand:VF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>")
+ (match_operand:VF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
(match_operand:VF_AVX512VL 3 "register_operand" "0"))
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
@@ -4078,9 +4078,9 @@ (define_insn "<avx512>_fmsub_<mode>_mask
(vec_merge:VF_AVX512VL
(fma:VF_AVX512VL
(match_operand:VF_AVX512VL 1 "register_operand" "0,0")
- (match_operand:VF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>,v")
+ (match_operand:VF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>,v")
(neg:VF_AVX512VL
- (match_operand:VF_AVX512VL 3 "nonimmediate_operand"
"v,<round_constraint>")))
+ (match_operand:VF_AVX512VL 3 "<round_nimm_predicate>"
"v,<round_constraint>")))
(match_dup 1)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
"TARGET_AVX512F"
@@ -4095,7 +4095,7 @@ (define_insn "<avx512>_fmsub_<mode>_mask
(vec_merge:VF_AVX512VL
(fma:VF_AVX512VL
(match_operand:VF_AVX512VL 1 "register_operand" "v")
- (match_operand:VF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>")
+ (match_operand:VF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
(neg:VF_AVX512VL
(match_operand:VF_AVX512VL 3 "register_operand" "0")))
(match_dup 3)
@@ -4201,8 +4201,8 @@ (define_insn "<avx512>_fnmadd_<mode>_mas
(fma:VF_AVX512VL
(neg:VF_AVX512VL
(match_operand:VF_AVX512VL 1 "register_operand" "0,0"))
- (match_operand:VF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>,v")
- (match_operand:VF_AVX512VL 3 "nonimmediate_operand"
"v,<round_constraint>"))
+ (match_operand:VF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>,v")
+ (match_operand:VF_AVX512VL 3 "<round_nimm_predicate>"
"v,<round_constraint>"))
(match_dup 1)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
"TARGET_AVX512F && <round_mode512bit_condition>"
@@ -4218,7 +4218,7 @@ (define_insn "<avx512>_fnmadd_<mode>_mas
(fma:VF_AVX512VL
(neg:VF_AVX512VL
(match_operand:VF_AVX512VL 1 "register_operand" "v"))
- (match_operand:VF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>")
+ (match_operand:VF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
(match_operand:VF_AVX512VL 3 "register_operand" "0"))
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
@@ -4328,9 +4328,9 @@ (define_insn "<avx512>_fnmsub_<mode>_mas
(fma:VF_AVX512VL
(neg:VF_AVX512VL
(match_operand:VF_AVX512VL 1 "register_operand" "0,0"))
- (match_operand:VF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>,v")
+ (match_operand:VF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>,v")
(neg:VF_AVX512VL
- (match_operand:VF_AVX512VL 3 "nonimmediate_operand"
"v,<round_constraint>")))
+ (match_operand:VF_AVX512VL 3 "<round_nimm_predicate>"
"v,<round_constraint>")))
(match_dup 1)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
"TARGET_AVX512F && <round_mode512bit_condition>"
@@ -4346,7 +4346,7 @@ (define_insn "<avx512>_fnmsub_<mode>_mas
(fma:VF_AVX512VL
(neg:VF_AVX512VL
(match_operand:VF_AVX512VL 1 "register_operand" "v"))
- (match_operand:VF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>")
+ (match_operand:VF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
(neg:VF_AVX512VL
(match_operand:VF_AVX512VL 3 "register_operand" "0")))
(match_dup 3)
@@ -4428,8 +4428,8 @@ (define_insn "<avx512>_fmaddsub_<mode>_m
(vec_merge:VF_AVX512VL
(unspec:VF_AVX512VL
[(match_operand:VF_AVX512VL 1 "register_operand" "0,0")
- (match_operand:VF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>,v")
- (match_operand:VF_AVX512VL 3 "nonimmediate_operand"
"v,<round_constraint>")]
+ (match_operand:VF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>,v")
+ (match_operand:VF_AVX512VL 3 "<round_nimm_predicate>"
"v,<round_constraint>")]
UNSPEC_FMADDSUB)
(match_dup 1)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
@@ -4445,7 +4445,7 @@ (define_insn "<avx512>_fmaddsub_<mode>_m
(vec_merge:VF_AVX512VL
(unspec:VF_AVX512VL
[(match_operand:VF_AVX512VL 1 "register_operand" "v")
- (match_operand:VF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>")
+ (match_operand:VF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
(match_operand:VF_AVX512VL 3 "register_operand" "0")]
UNSPEC_FMADDSUB)
(match_dup 3)
@@ -4495,9 +4495,9 @@ (define_insn "<avx512>_fmsubadd_<mode>_m
(vec_merge:VF_AVX512VL
(unspec:VF_AVX512VL
[(match_operand:VF_AVX512VL 1 "register_operand" "0,0")
- (match_operand:VF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>,v")
+ (match_operand:VF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>,v")
(neg:VF_AVX512VL
- (match_operand:VF_AVX512VL 3 "nonimmediate_operand"
"v,<round_constraint>"))]
+ (match_operand:VF_AVX512VL 3 "<round_nimm_predicate>"
"v,<round_constraint>"))]
UNSPEC_FMADDSUB)
(match_dup 1)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
@@ -4513,7 +4513,7 @@ (define_insn "<avx512>_fmsubadd_<mode>_m
(vec_merge:VF_AVX512VL
(unspec:VF_AVX512VL
[(match_operand:VF_AVX512VL 1 "register_operand" "v")
- (match_operand:VF_AVX512VL 2 "nonimmediate_operand"
"<round_constraint>")
+ (match_operand:VF_AVX512VL 2 "<round_nimm_predicate>"
"<round_constraint>")
(neg:VF_AVX512VL
(match_operand:VF_AVX512VL 3 "register_operand" "0"))]
UNSPEC_FMADDSUB)
@@ -4531,7 +4531,7 @@ (define_expand "fmai_vmfmadd_<mode><roun
[(set (match_operand:VF_128 0 "register_operand")
(vec_merge:VF_128
(fma:VF_128
- (match_operand:VF_128 1 "<round_nimm_predicate>")
+ (match_operand:VF_128 1 "register_operand")
(match_operand:VF_128 2 "<round_nimm_predicate>")
(match_operand:VF_128 3 "<round_nimm_predicate>"))
(match_dup 1)
@@ -4542,7 +4542,7 @@ (define_expand "fmai_vmfmsub_<mode><roun
[(set (match_operand:VF_128 0 "register_operand")
(vec_merge:VF_128
(fma:VF_128
- (match_operand:VF_128 1 "<round_nimm_predicate>")
+ (match_operand:VF_128 1 "register_operand")
(match_operand:VF_128 2 "<round_nimm_predicate>")
(neg:VF_128
(match_operand:VF_128 3 "<round_nimm_predicate>")))
@@ -4556,7 +4556,7 @@ (define_expand "fmai_vmfnmadd_<mode><rou
(fma:VF_128
(neg:VF_128
(match_operand:VF_128 2 "<round_nimm_predicate>"))
- (match_operand:VF_128 1 "<round_nimm_predicate>")
+ (match_operand:VF_128 1 "register_operand")
(match_operand:VF_128 3 "<round_nimm_predicate>"))
(match_dup 1)
(const_int 1)))]
@@ -4568,7 +4568,7 @@ (define_expand "fmai_vmfnmsub_<mode><rou
(fma:VF_128
(neg:VF_128
(match_operand:VF_128 2 "<round_nimm_predicate>"))
- (match_operand:VF_128 1 "<round_nimm_predicate>")
+ (match_operand:VF_128 1 "register_operand")
(neg:VF_128
(match_operand:VF_128 3 "<round_nimm_predicate>")))
(match_dup 1)
@@ -4579,9 +4579,9 @@ (define_insn "*fmai_fmadd_<mode>"
[(set (match_operand:VF_128 0 "register_operand" "=v,v")
(vec_merge:VF_128
(fma:VF_128
- (match_operand:VF_128 1 "<round_nimm_predicate>" " 0, 0")
+ (match_operand:VF_128 1 "register_operand" "0,0")
(match_operand:VF_128 2 "<round_nimm_predicate>"
"<round_constraint>, v")
- (match_operand:VF_128 3 "<round_nimm_predicate>" "
v,<round_constraint>"))
+ (match_operand:VF_128 3 "<round_nimm_predicate>"
"v,<round_constraint>"))
(match_dup 1)
(const_int 1)))]
"TARGET_FMA || TARGET_AVX512F"
@@ -4595,10 +4595,10 @@ (define_insn "*fmai_fmsub_<mode>"
[(set (match_operand:VF_128 0 "register_operand" "=v,v")
(vec_merge:VF_128
(fma:VF_128
- (match_operand:VF_128 1 "<round_nimm_predicate>" "0,0")
+ (match_operand:VF_128 1 "register_operand" "0,0")
(match_operand:VF_128 2 "<round_nimm_predicate>"
"<round_constraint>,v")
(neg:VF_128
- (match_operand:VF_128 3 "<round_nimm_predicate>" "
v,<round_constraint>")))
+ (match_operand:VF_128 3 "<round_nimm_predicate>"
"v,<round_constraint>")))
(match_dup 1)
(const_int 1)))]
"TARGET_FMA || TARGET_AVX512F"
@@ -4614,7 +4614,7 @@ (define_insn "*fmai_fnmadd_<mode><round_
(fma:VF_128
(neg:VF_128
(match_operand:VF_128 2 "<round_nimm_predicate>"
"<round_constraint>,v"))
- (match_operand:VF_128 1 "<round_nimm_predicate>" "0,0")
+ (match_operand:VF_128 1 "register_operand" "0,0")
(match_operand:VF_128 3 "<round_nimm_predicate>"
"v,<round_constraint>"))
(match_dup 1)
(const_int 1)))]
@@ -4630,10 +4630,10 @@ (define_insn "*fmai_fnmsub_<mode><round_
(vec_merge:VF_128
(fma:VF_128
(neg:VF_128
- (match_operand:VF_128 2 "<round_nimm_predicate>"
"<round_constraint>, v"))
- (match_operand:VF_128 1 "<round_nimm_predicate>" " 0, 0")
+ (match_operand:VF_128 2 "<round_nimm_predicate>"
"<round_constraint>,v"))
+ (match_operand:VF_128 1 "register_operand" "0,0")
(neg:VF_128
- (match_operand:VF_128 3 "<round_nimm_predicate>" "
v,<round_constraint>")))
+ (match_operand:VF_128 3 "<round_nimm_predicate>"
"v,<round_constraint>")))
(match_dup 1)
(const_int 1)))]
"TARGET_FMA || TARGET_AVX512F"
Jakub
