On Mon, Jun 24, 2019 at 02:45:09PM +0800, Kewen.Lin wrote:
> on 2019/6/24 δΈ‹εˆ2:00, Li Jia He wrote:
> > -#define TARGET_MADDLD      (TARGET_MODULO && TARGET_POWERPC64)
> > +#define TARGET_MADDLD      TARGET_MODULO
> 
> IMHO, I don't think this removal of TARGET_POWERPC64 is reasonable.
> As ISA V3.0, the description of this insn maddld is:
> GPR[RT].dword[0] ← Chop(result, 64)
> 
> It assumes the GPR has dword, it's a 64-bit specific insn, right?
> Your change relaxes it to be adopted on 32-bit.
> Although it's fine for powerpc LE since it's always 64-bit, it will
> have problems for power9 32bit like AIX?

Hi Kewen,

Newer ISAs require 64-bit to be implemented.  There are no optional
64-bit categories anymore.  Since this instruction is enabled for P9
(ISA 3.0) only (that's the TARGET_MODULO), it's fine.

What you are saying is quite true for older CPUs/ISAs though: there you
have to make sure you are targetting a CPU that supports the 64-bit
categories, before using any 64-bit insns.

But those days are gone :-)


Segher

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