>>> On 27.06.19 at 10:59, wrote:
> NOT on vectors of integers does not require loading a constant vector of
> all ones into a register - VPTERNLOG can be used here (and could/should
> be further used to carry out other binary and ternary logical operations
> which don't have a special purpose instruction).
>
> gcc/
> 2019-06-27 Jan Beulich <jbeul...@suse.com>
>
> * config/i386/sse.md (ternlogsuffix): New.
> (one_cmpl<mode>2): Don't force CONSTM1_RTX into a register when
> AVX512F is in use.
> (<mask_codefor>one_cmpl<mode>2<mask_name>): New.
>
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -853,6 +853,13 @@
> (V4SF "k") (V2DF "q")
> (SF "k") (DF "q")])
>
> +;; Mapping of vector modes to VPTERNLOG suffix
> +(define_mode_attr ternlogsuffix
> + [(V8DI "q") (V4DI "q") (V2DI "q")
> + (V16SI "d") (V8SI "d") (V4SI "d")
> + (V32HI "d") (V16HI "d") (V8HI "d")
> + (V64QI "d") (V32QI "d") (V16QI "d")])
> +
> ;; Number of scalar elements in each vector type
> (define_mode_attr ssescalarnum
> [(V64QI "64") (V16SI "16") (V8DI "8")
> @@ -12564,9 +12571,22 @@
> (match_dup 2)))]
> "TARGET_SSE"
> {
> - operands[2] = force_reg (<MODE>mode, CONSTM1_RTX (<MODE>mode));
> + if (!TARGET_AVX512F)
> + operands[2] = force_reg (<MODE>mode, CONSTM1_RTX (<MODE>mode));
> + else
> + operands[2] = CONSTM1_RTX (<MODE>mode);
> })
>
> +(define_insn "<mask_codefor>one_cmpl<mode>2<mask_name>"
> + [(set (match_operand:VI 0 "register_operand" "=v")
> + (xor:VI (match_operand:VI 1 "nonimmediate_operand" "vm")
> + (match_operand:VI 2 "vector_all_ones_operand" "BC")))]
> + "TARGET_AVX512F"
> + "vpternlog<ternlogsuffix>\t{$0x55, %1, %0,
> %0<mask_operand3>|%0<mask_operand3>, %0, %1, 0x55}"
> + [(set_attr "type" "sselog")
> + (set_attr "prefix" "evex")
> + (set_attr "mode" "<sseinsnmode>")])
> +
> (define_expand "<sse2_avx2>_andnot<mode>3"
> [(set (match_operand:VI_AVX2 0 "register_operand")
> (and:VI_AVX2
>
>
>
>
