On Wed, Aug 07, 2019 at 07:24:18PM +0100, Richard Sandiford wrote: > aarch64_classify_vector_mode used properties of a mode to test whether > the mode was a single Advanced SIMD vector, a single SVE vector, or a > tuple of SVE vectors. That works well for current trunk and is simpler > than checking for modes by name. > > However, for the ACLE and for planned autovec improvements, we also > need partial SVE vector modes that hold: > > - half of the available 32-bit elements > - a half or quarter of the available 16-bit elements > - a half, quarter, or eighth of the available 8-bit elements > > These should be packed in memory and unpacked in registers. E.g. > VNx2SI has half the number of elements of VNx4SI, and so is half the > size in memory. When stored in registers, each VNx2SI element occupies > the low 32 bits of a VNx2DI element, with the upper bits being undefined. > > The upshot is that: > > GET_MODE_SIZE (VNx4SImode) == 2 * GET_MODE_SIZE (VNx2SImode) > > since GET_MODE_SIZE must always be the memory size. This in turn means > that for fixed-length SVE, some partial modes can have the same size as > Advanced SIMD modes. We then need to be specific about which mode we're > dealing with. > > This patch prepares for that by switching based on the mode instead > of querying properties. > > A later patch makes sure that Advanced SIMD modes always win over > partial SVE vector modes in normal queries. > > Tested on aarch64-linux-gnu (with and without SVE) and aarch64_be-elf. > OK to install?
OK. Thanks, James > > Richard > > > 2019-08-07 Richard Sandiford <richard.sandif...@arm.com> > > gcc/ > * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Switch > based on the mode instead of testing properties of it.
