The add-with-carry operation which involves a shift doesn't match at present because it isn't matching the canonical form generated by combine. Fixing this is simply a matter of re-ordering the operands.
* config/arm/arm.md (addsi3_carryin_shift_<optab>): Reorder operands to match canonical form. --- gcc/config/arm/arm.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 4a7a64e6613..9754a761faf 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -913,8 +913,8 @@ (define_insn "*addsi3_carryin_shift_<optab>" (match_operator:SI 2 "shift_operator" [(match_operand:SI 3 "s_register_operand" "r") (match_operand:SI 4 "reg_or_int_operand" "rM")]) - (match_operand:SI 1 "s_register_operand" "r")) - (LTUGEU:SI (reg:<cnb> CC_REGNUM) (const_int 0))))] + (LTUGEU:SI (reg:<cnb> CC_REGNUM) (const_int 0))) + (match_operand:SI 1 "s_register_operand" "r")))] "TARGET_32BIT" "adc%?\\t%0, %1, %3%S2" [(set_attr "conds" "use")