The UNSPEC_WHILE*s had an underscore before the condition code,
whereas almost all other SVE unspecs are taken directly from
the mnemonic.

Tested on aarch64-linux-gnu and applied as r280053.

Richard


2020-01-09  Richard Sandiford  <richard.sandif...@arm.com>

gcc/
        * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
        (UNSPEC_WHILELE): ...this.
        (UNSPEC_WHILE_LO): Rename to...
        (UNSPEC_WHILELO): ...this.
        (UNSPEC_WHILE_LS): Rename to...
        (UNSPEC_WHILELS): ...this.
        (UNSPEC_WHILE_LT): Rename to...
        (UNSPEC_WHILELT): ...this.
        * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
        (cmp_op, while_optab_cmp): Likewise.
        * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
        * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
        (svwhilelt): Likewise.

Index: gcc/config/aarch64/aarch64.md
===================================================================
--- gcc/config/aarch64/aarch64.md       2020-01-06 12:58:16.453794569 +0000
+++ gcc/config/aarch64/aarch64.md       2020-01-09 15:23:45.215278947 +0000
@@ -241,10 +241,10 @@ (define_c_enum "unspec" [
     UNSPEC_UNPACKSLO
     UNSPEC_UNPACKULO
     UNSPEC_PACK
-    UNSPEC_WHILE_LE
-    UNSPEC_WHILE_LO
-    UNSPEC_WHILE_LS
-    UNSPEC_WHILE_LT
+    UNSPEC_WHILELE
+    UNSPEC_WHILELO
+    UNSPEC_WHILELS
+    UNSPEC_WHILELT
     UNSPEC_WHILERW
     UNSPEC_WHILEWR
     UNSPEC_LDN
Index: gcc/config/aarch64/iterators.md
===================================================================
--- gcc/config/aarch64/iterators.md     2020-01-09 15:14:31.838844029 +0000
+++ gcc/config/aarch64/iterators.md     2020-01-09 15:23:45.215278947 +0000
@@ -2082,8 +2082,8 @@ (define_int_iterator SVE_FP_TERNARY_LANE
 (define_int_iterator SVE_CFP_TERNARY_LANE [UNSPEC_FCMLA UNSPEC_FCMLA90
                                           UNSPEC_FCMLA180 UNSPEC_FCMLA270])
 
-(define_int_iterator SVE_WHILE [UNSPEC_WHILE_LE UNSPEC_WHILE_LO
-                               UNSPEC_WHILE_LS UNSPEC_WHILE_LT])
+(define_int_iterator SVE_WHILE [UNSPEC_WHILELE UNSPEC_WHILELO
+                               UNSPEC_WHILELS UNSPEC_WHILELT])
 
 (define_int_iterator SVE2_WHILE_PTR [UNSPEC_WHILERW UNSPEC_WHILEWR])
 
@@ -2486,17 +2486,17 @@ (define_int_attr cmp_op [(UNSPEC_COND_CM
                         (UNSPEC_COND_FCMLE "le")
                         (UNSPEC_COND_FCMLT "lt")
                         (UNSPEC_COND_FCMNE "ne")
-                        (UNSPEC_WHILE_LE "le")
-                        (UNSPEC_WHILE_LO "lo")
-                        (UNSPEC_WHILE_LS "ls")
-                        (UNSPEC_WHILE_LT "lt")
+                        (UNSPEC_WHILELE "le")
+                        (UNSPEC_WHILELO "lo")
+                        (UNSPEC_WHILELS "ls")
+                        (UNSPEC_WHILELT "lt")
                         (UNSPEC_WHILERW "rw")
                         (UNSPEC_WHILEWR "wr")])
 
-(define_int_attr while_optab_cmp [(UNSPEC_WHILE_LE "le")
-                                 (UNSPEC_WHILE_LO "ult")
-                                 (UNSPEC_WHILE_LS "ule")
-                                 (UNSPEC_WHILE_LT "lt")])
+(define_int_attr while_optab_cmp [(UNSPEC_WHILELE "le")
+                                 (UNSPEC_WHILELO "ult")
+                                 (UNSPEC_WHILELS "ule")
+                                 (UNSPEC_WHILELT "lt")])
 
 (define_int_attr raw_war [(UNSPEC_WHILERW "raw")
                          (UNSPEC_WHILEWR "war")])
Index: gcc/config/aarch64/aarch64.c
===================================================================
--- gcc/config/aarch64/aarch64.c        2020-01-09 15:08:17.485253359 +0000
+++ gcc/config/aarch64/aarch64.c        2020-01-09 15:23:45.211278974 +0000
@@ -4272,7 +4272,7 @@ aarch64_sve_move_pred_via_while (rtx tar
 {
   rtx limit = force_reg (DImode, gen_int_mode (vl, DImode));
   target = aarch64_target_reg (target, mode);
-  emit_insn (gen_while (UNSPEC_WHILE_LO, DImode, mode,
+  emit_insn (gen_while (UNSPEC_WHILELO, DImode, mode,
                        target, const0_rtx, limit));
   return target;
 }
Index: gcc/config/aarch64/aarch64-sve-builtins-base.cc
===================================================================
--- gcc/config/aarch64/aarch64-sve-builtins-base.cc     2020-01-09 
15:18:22.865356108 +0000
+++ gcc/config/aarch64/aarch64-sve-builtins-base.cc     2020-01-09 
15:23:45.207278998 +0000
@@ -2666,8 +2666,8 @@ FUNCTION (svunpkhi, svunpk_impl, (true))
 FUNCTION (svunpklo, svunpk_impl, (false))
 FUNCTION (svuzp1, svuzp_impl, (0))
 FUNCTION (svuzp2, svuzp_impl, (1))
-FUNCTION (svwhilele, svwhile_impl, (UNSPEC_WHILE_LE, UNSPEC_WHILE_LS, true))
-FUNCTION (svwhilelt, svwhile_impl, (UNSPEC_WHILE_LT, UNSPEC_WHILE_LO, false))
+FUNCTION (svwhilele, svwhile_impl, (UNSPEC_WHILELE, UNSPEC_WHILELS, true))
+FUNCTION (svwhilelt, svwhile_impl, (UNSPEC_WHILELT, UNSPEC_WHILELO, false))
 FUNCTION (svwrffr, svwrffr_impl,)
 FUNCTION (svzip1, svzip_impl, (0))
 FUNCTION (svzip2, svzip_impl, (1))

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