Since Intel SDM uses hexadecimal, use hexadecimal in comments.
PR target/95260
* config/i386/cpuid.h: Use hexadecimal in comments.
---
gcc/ChangeLog | 5 +++++
gcc/config/i386/cpuid.h | 6 +++---
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 89b908f64d8..977e7664b62 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2020-05-21 H.J. Lu <hongjiu...@intel.com>
+
+ PR target/95260
+ * config/i386/cpuid.h: Use hexadecimal in comments.
+
2020-05-21 H.J. Lu <hongjiu...@intel.com>
PR target/95212
diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
index 9fee32a8f1d..94af4910d3c 100644
--- a/gcc/config/i386/cpuid.h
+++ b/gcc/config/i386/cpuid.h
@@ -125,16 +125,16 @@
#define bit_SERIALIZE (1 << 14)
#define bit_TSXLDTRK (1 << 16)
-/* XFEATURE_ENABLED_MASK register bits (%eax == 13, %ecx == 0) */
+/* XFEATURE_ENABLED_MASK register bits (%eax == 0xd, %ecx == 0) */
#define bit_BNDREGS (1 << 3)
#define bit_BNDCSR (1 << 4)
-/* Extended State Enumeration Sub-leaf (%eax == 13, %ecx == 1) */
+/* Extended State Enumeration Sub-leaf (%eax == 0xd, %ecx == 1) */
#define bit_XSAVEOPT (1 << 0)
#define bit_XSAVEC (1 << 1)
#define bit_XSAVES (1 << 3)
-/* PT sub leaf (%eax == 14, %ecx == 0) */
+/* PT sub leaf (%eax == 0x14, %ecx == 0) */
/* %ebx */
#define bit_PTWRITE (1 << 4)
--
2.26.2
