On Mon, May 25, 2020 at 8:13 AM Hongtao Liu <crazy...@gmail.com> wrote:
> (define_insn "sse_storehps"
> [(set (match_operand:V2SF 0 "nonimmediate_operand" "=m,v,v")
> (vec_select:V2SF
> (match_operand:V4SF 1 "nonimmediate_operand" "v,v,o")
> (parallel [(const_int 2) (const_int 3)])))]
> "TARGET_SSE && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
> "@
> %vmovhps\t{%1, %0|%q0, %1}
> %vmovhlps\t{%1, %d0|%d0, %1}
> %vmovlps\t{%H1, %d0|%d0, %H1}"
> [(set_attr "type" "ssemov")
> (set_attr "prefix" "maybe_vex")
> (set_attr "mode" "V2SF,V4SF,V2SF")])
>
> (define_insn "sse_storelps"
> [(set (match_operand:V2SF 0 "nonimmediate_operand" "=m,v,v")
> (vec_select:V2SF
> (match_operand:V4SF 1 "nonimmediate_operand" " v,v,m")
> (parallel [(const_int 0) (const_int 1)])))]
> "TARGET_SSE && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
> "@
> %vmovlps\t{%1, %0|%q0, %1}
> %vmovaps\t{%1, %0|%0, %1}
> %vmovlps\t{%1, %d0|%d0, %q1}"
> [(set_attr "type" "ssemov")
> (set_attr "prefix" "maybe_vex")
> (set_attr "mode" "V2SF,V4SF,V2SF")])
>
> Should they be restricted under TARGET_MMX_WITH_SSE or is there
> anything i missed?
You missed our sincere hope that reload won't spill register with MMX move ;) .
On a serious note, there are other safety nets in place that prevent
compiler from generating moves involving MMX registers for V2SFmode,
such as lying to the compiler that moves to/from MMX regset require
memory (see ix86_register_move_cost).
So, let sleeping dogs lie.
Uros.
