On Mon, 2020-06-01 at 16:01 -0400, Michael Meissner via Gcc-patches wrote: > Add support for the new IEEE 128-bit minimum, maximum, and set compare mask > instructions when -mcpu=future was used. > > gcc/ > 2020-06-01 Michael Meissner <meiss...@linux.ibm.com> > > * config/rs6000/rs6000.c (rs6000_emit_hw_fp_minmax): Update > comment. > (rs6000_emit_hw_fp_cmove): Update comment. > (rs6000_emit_cmove): Add support for IEEE 128-bit min, max, and > comparisons with -mcpu=future. > (rs6000_emit_minmax): Add support for IEEE 128-bit min/max with > -mcpu=future. > * config/rs6000/rs6000.md (s<minmax><mode>3, IEEE128 iterator): > New insns for IEEE 128-bit min/max. > (mov<mode>cc, IEEE128 iterator): New insns for IEEE 128-bit > conditional move. > (mov<mode>cc_future, IEEE128 iterator): New insns for IEEE 128-bit > conditional move. > (mov<mode>cc_invert_future, IEEE128 iterator): New insns for IEEE > 128-bit conditional move. > (fpmask<mode>, IEEE128 iterator): New insns for IEEE 128-bit > conditional move.
Include the leading wildcard here? (*fpmask<mode> ... and missing an entry for this one: (*xxsel<mode> ... > > testsuite/ > 2020-06-01 Michael Meissner <meiss...@linux.ibm.com> > > * gcc.target/powerpc/float128-minmax-2.c: New test. > --- > gcc/config/rs6000/rs6000.c | 26 ++++- > gcc/config/rs6000/rs6000.md | 121 > +++++++++++++++++++++ > .../gcc.target/powerpc/float128-minmax-2.c | 70 ++++++++++++ > 3 files changed, 214 insertions(+), 3 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/powerpc/float128-minmax-2.c > > diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c > index 0921328..bbba8f1 100644 > --- a/gcc/config/rs6000/rs6000.c > +++ b/gcc/config/rs6000/rs6000.c > @@ -14847,7 +14847,9 @@ rs6000_emit_vector_cond_expr (rtx dest, rtx op_true, > rtx op_false, > /* ISA 3.0 (power9) minmax subcase to emit a XSMAXCDP or XSMINCDP instruction > for SF/DF scalars. Move TRUE_COND to DEST if OP of the operands of the > last > comparison is nonzero/true, FALSE_COND if it is zero/false. Return 0 if > the > - hardware has no such operation. */ > + hardware has no such operation. > + > + Under FUTURE, also handle IEEE 128-bit floating point. */ > > static int > rs6000_emit_hw_fp_minmax (rtx dest, rtx op, rtx true_cond, rtx false_cond) > @@ -14889,7 +14891,9 @@ rs6000_emit_hw_fp_minmax (rtx dest, rtx op, rtx > true_cond, rtx false_cond) > /* ISA 3.0 (power9) conditional move subcase to emit XSCMP{EQ,GE,GT,NE}DP and > XXSEL instructions for SF/DF scalars. Move TRUE_COND to DEST if OP of the > operands of the last comparison is nonzero/true, FALSE_COND if it is > - zero/false. Return 0 if the hardware has no such operation. */ > + zero/false. Return 0 if the hardware has no such operation. > + > + Under FUTURE, also handle IEEE 128-bit conditional moves. */ > > static int > rs6000_emit_hw_fp_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond) > @@ -14981,6 +14985,21 @@ rs6000_emit_cmove (rtx dest, rtx op, rtx true_cond, > rtx false_cond) > return 1; > } > > + /* See if we can use the FUTURE min/max/compare instructions for IEEE > 128-bit > + floating point. At present, don't worry about doing conditional moves > + with different types for the comparison and movement (unlike SF/DF, > where > + you can do a conditional test between double and use float as the > if/then > + parts. */ Why don't we worry about that now? Should this be a 'future todo' comment here? Beyond those nits and questions, lgtm, Thanks, -Will